Data Packing Using Word Length And The Frame-Synchronization Ignore Function; Mcbsp Registers; 8-Bit Data Words Transferred At Maximum Packet Frequency; Configuring The Data Stream Of As A Continuous 32-Bit Word - Texas Instruments Concerto F28M36 Series Technical Reference Manual

www.ti.com

15.11.2 Data Packing Using Word Length and the Frame-Synchronization Ignore Function

When there are multiple words per frame, you can implement data packing by increasing the word length
(defining a serial word with more bits) and by ignoring frame-synchronization pulses. First, consider
Figure 15-63, which shows the McBSP operating at the maximum packet frequency. Here, each frame
only has a single 8-bit word. Notice the frame-synchronization pulse that initiates each frame transfer for
reception and for transmission. For reception, this configuration requires one read operation for each
word. For transmission, this configuration requires one write operation for each word.
Figure 15-63. 8-Bit Data Words Transferred at Maximum Packet Frequency
CLKR
FSR
DR
RBR1 to DRR1 copy
CLKX
FSX
DX
DXR1 to XSR1 copy
Figure 15-64 shows the McBSP configured to treat this data stream as a continuous 32-bit word. In this
example, the McBSP responds to an initial frame-synchronization pulse. However, (R/X)FIG = 1 so that
the McBSP ignores subsequent pulses. Only two read transfers or two write transfers are needed every
32 bits. This configuration effectively reduces the required bus bandwidth to half the bandwidth needed to
transfer four 8-bit words.
Figure 15-64. Configuring the Data Stream of
CLKR
FSR
DR
CLKX
FSX
DX
DXR2 to XSR2 copy

15.12 McBSP Registers

This section describes the McBSP registers.
Table 15-71 shows the registers accessible on each McBSP.
describe the register bits.
SPRUHE8E – October 2012 – Revised November 2019
Submit Documentation Feedback
Word 1
Word 2
RBR1 to DRR1 copy
DXR1 to XSR1 copy
Frame ignored
RBR2 to DRR2 copy
Frame ignored
Copyright © 2012–2019, Texas Instruments Incorporated
Word 3
RBR1 to DRR1 copy RBR1 to DRR1 copy
DXR1 to XSR1 copy DXR1 to XSR1 copy
Figure 15-63 as a Continuous 32-Bit Word
Word 1
Frame ignored Frame ignored
RBR1 to DRR1 copy
Frame ignored Frame ignored
DXR1 to XSR1 copy
Section 15.12.2
C28 Multichannel Buffered Serial Port (McBSP)
Data Packing Examples
Word 4
through Section 15.12.11
1155