RAM Control Module Registers
5.2.4.23 Master CPU Write Access Violation Address Register (CMWRAVADDR)
Figure 5-78. Master CPU Write Access Violation Address Register (CMWRAVADDR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-87. Master CPU Write Access Violation Address Register (CMWRAVADDR) Field
Bit
Field
31-0
MCPUWRAVADDR
5.2.4.24 Master DMA Write Access Violation Address Register (CMDMAWRAVADDR)
Figure 5-79. Master DMA Write Access Violation Address Register (CMDMAWRAVADDR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-88. Master DMA Write Access Violation Address Register (CMDMAWRAVADDR) Field
Bit
Field
31-0
MDMAWRAVADDR
5.2.4.25 Master CPU Fetch Access Violation Address Register (CMFAVADDR)
Figure 5-80. Master CPU Fetch Access Violation Address Register (CMFAVADDR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-89. Master CPU Fetch Access Violation Address Register (CMFAVADDR) Field
Bit
Field
31-0
MCPUFAVADDR
534
Internal Memory
MCPUWRAVADDR
R-0
Descriptions
Value
Description
Master CPU Write Access Violation Address
This holds the address at which C28x CPU attempted a write access and the master
CPU write access violation occurred.
NMDMAWRAVADDR
R-0
Descriptions
Value
Description
Master DMA Write Access Violation Address
This holds the address at which C28x DMA attempted a write access and the master
DMA write access violation occurred.
MCPUFAVADDR
R-0
Descriptions
Value
Description
Master CPU Fetch Access Violation Address
This holds the address at which C28x CPU attempted a code fetch and the master CPU
fetch access violation occurred.
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SPRUHE8E – October 2012 – Revised November 2019
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