Spi Emulation Buffer Register (Spirxemu) - Address 7046H; Spi Serial Receive Buffer Register (Spirxbuf) - Address 7047H; Spi Emulation Buffer Register (Spirxemu) Field Descriptions; Spi Serial Receive Buffer Register (Spirxbuf) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Figure 12-17. SPI Emulation Buffer Register (SPIRXEMU) — Address 7046h

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 12-13. SPI Emulation Buffer Register (SPIRXEMU) Field Descriptions

ERXB15− ERXB0

12.3.1.6 SPI Serial Receive Buffer Register (SPIRXBUF)

SPIRXBUF contains the received data. Reading SPIRXBUF clears the SPI INT FLAG bit (SPISTS.6).

Figure 12-18. SPI Serial Receive Buffer Register (SPIRXBUF) — Address 7047h

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 12-14. SPI Serial Receive Buffer Register (SPIRXBUF) Field Descriptions

RXB15 − RXB0

12.3.1.7 SPI Serial Transmit Buffer Register (SPITXBUF)

SPITXBUF stores the next character to be transmitted. Writing to this register sets the TX BUF FULL Flag

bit (SPISTS.5). When transmission of the current character is complete, the contents of this register are

automatically loaded in SPIDAT and the TX BUF FULL Flag is cleared. If no transmission is currently

active, data written to this register falls through into the SPIDAT register and the TX BUF FULL Flag is not

In master mode, if no transmission is currently active, writing to this register initiates a transmission in the

same manner that writing to SPIDAT does.

SPRUHE8E – October 2012 – Revised November 2019

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Emulation Buffer Received Data. SPIRXEMU functions almost identically to SPIRXBUF, except that

reading SPIRXEMU does not clear the SPI INT FLAG bit (SPISTS.6). Once the SPIDAT has

received the complete character, the character is transferred to SPIRXEMU and SPIRXBUF, where

it can be read. At the same time, SPI INT FLAG is set.

This mirror register was created to support emulation. Reading SPIRXBUF clears the SPI INT

FLAG bit (SPISTS.6). In the normal operation of the emulator, the control registers are read to

continually update the contents of these registers on the display screen. SPIRXEMU was created

so that the emulator can read this register and properly update the contents on the display screen.

Reading SPIRXEMU does not clear the SPI INT FLAG bit, but reading SPIRXBUF clears this flag.

In other words, SPIRXEMU enables the emulator to emulate the true operation of the SPI more

It is recommended that you view SPIRXEMU in the normal emulator run mode.

Received Data. Once SPIDAT has received the complete character, the character is transferred to

SPIRXBUF, where it can be read. At the same time, the SPI INT FLAG bit (SPISTS.6) is set. Since

data is shifted into the SPI's most significant bit first, it is stored right-justified in this register.

C28 Serial Peripheral Interface (SPI)

SPI Registers and Waveforms

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