Ecap Control Register 2 (Ecctl2) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Bit(s)
Field
15:11
Reserved
10
APWMPOL
9
CAP/APWM
8
SWSYNC
7:6
SYNCO_SEL
5
SYNCI_EN
4
TSCTRSTOP
3
RE-ARM
2:1
STOP_WRAP
SPRUHE8E – October 2012 – Revised November 2019
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Table 8-8. ECAP Control Register 2 (ECCTL2) Field Descriptions
Description
Reserved
APWM output polarity select. This is applicable only in APWM operating mode
0
Output is active high (Compare value defines high time)
1
Output is active low (Compare value defines low time)
CAP/APWM operating mode select
0
ECAP module operates in capture mode. This mode forces the following
configuration:
• Inhibits TSCTR resets via CTR = PRD event
• Inhibits shadow loads on CAP1 and 2 registers
• Permits user to enable CAP1-4 register load
• CAPx/APWMx pin operates as a capture input
1
ECAP module operates in APWM mode. This mode forces the following
configuration:
• Resets TSCTR on CTR = PRD event (period boundary
• Permits shadow loading on CAP1 and 2 registers
• Disables loading of time-stamps into CAP1-4 registers
• CAPx/APWMx pin operates as a APWM output
Software-forced Counter (TSCTR) Synchronizing. This provides a convenient
software method to synchronize some or all ECAP time bases. In APWM mode,
the synchronizing can also be done via the CTR = PRD event.
0
Writing a zero has no effect. Reading always returns a zero
1
Writing a one forces a TSCTR shadow load of current ECAP module and any
ECAP modules down-stream providing the SYNCO_SEL bits are 0,0. After writing
a 1, this bit returns to a zero.
Note: Selection CTR = PRD is meaningful only in APWM mode; however, you can
choose it in CAP mode if you find doing so useful.
Sync-Out Select
00
Select sync-in event to be the sync-out signal (pass through)
01
Select CTR = PRD event to be the sync-out signal
10
Disable sync out signal
11
Disable sync out signal
Counter (TSCTR) Sync-In select mode
0
Disable sync-in option
1
Enable counter (TSCTR) to be loaded from CTRPHS register upon either a SYNCI
signal or a S/W force event.
Time Stamp (TSCTR) Counter Stop (freeze) Control
0
TSCTR stopped
1
TSCTR free-running
One-Shot Re-Arming Control ( wait for stop trigger). Note: The re-arm function is
valid in one shot or continuous mode.
0
Has no effect (reading always returns a 0)
1
Arms the one-shot sequence as follows:
1) Resets the Mod4 counter to zero
2) Unfreezes the Mod4 counter
3) Enables capture register loads
Stop value for one-shot mode. This is the number (between 1-4) of captures
allowed to occur before the CAP(1-4) registers are frozen, that is, capture
sequence is stopped.
Wrap value for continuous mode. This is the number (between 1-4) of the capture
register in which the circular buffer wraps around and starts again.
00
Stop after Capture Event 1 in one-shot mode
Wrap after Capture Event 1 in continuous mode.
01
Stop after Capture Event 2 in one-shot mode
Wrap after Capture Event 2 in continuous mode.
Copyright © 2012–2019, Texas Instruments Incorporated
Capture Module - Control and Status Registers
C28 Enhanced Capture (eCAP) Module
841

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