Gpio Port G Data (Gpgdat) Register; Gpio Port G Data (Gpgdat) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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4.2.7.43 GPIO Port G Data (GPGDAT) Register

The GPIO Port G Data (GPGDAT) register is shown and described in the figure and table below.
31
15
7 6
GPIO199 GPIO198
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-93. GPIO Port G Data (GPGDAT) Register Field Descriptions
Bit Field
31-8 Reserved
7-0 GPIO199-GPIO192
SPRUHE8E – October 2012 – Revised November 2019
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Figure 4-84. GPIO Port G Data (GPGDAT) Register
5 4
GPIO197 GPIO196
R/W-0 R/W-0
Value
Any writes to these bit(s) must always have a value of 0.
Each bit corresponds to one GPIO port G pin (GPIO192-GPIO199)
0 Reading a 0 indicates that the state of the pin is currently low, irrespective of the mode the pin is
configured for.
Writing a 0 will force an output of 0 if the pin is configured as a GPIO output in the appropriate
GPGMUX1 and GPGDIR registers; otherwise, the value is latched but not used to drive the pin.
1 Reading a 1 indicates that the state of the pin is currently high irrespective of the mode the pin is
configured for.
Writing a 1 will force an output of 1 if the pin is configured as a GPIO output in the GPGMUX1
and GPGDIR registers; otherwise, the value is latched but not used to drive the pin.
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
Resrerved
R-0
Reserved
R-0
3 2
GPIO195 GPIO194
R/W-0 R/W-0
Description
General-Purpose Input/Output (GPIO)
16
8
1 0
GPIO193 GPIO192
R/W-0 R/W-0
451