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Return Flash EntryPoint
Figure 6-30
shows the transfer flow from the host side. The operating speed of the CPU and host are not
critical in this mode as the host will wait for the device and the device will in turn wait for the host. In this
manner the protocol will work with both a host running faster and a host running slower than the device.
SPRUHE8E – October 2012 – Revised November 2019
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Figure 6-29. Parallel GPIO Mode Overview
Parallel_Boot
Initialize GP I/O MUX
and Dir registers
GPIO[9,8,5:0] = input
GPIO27 = input
GPIO26 = output
Enable pullups on
GPIO[9,8,5:0]
Valid
No
KeyValue
(0x08AA)
?
Yes
Copyright © 2012–2019, Texas Instruments Incorporated
C-Boot ROM Description
Read and discard 8
reserved words
Read EntryPoint
address
Call
CopyData
Return
EntryPoint
ROM Code and Peripheral Booting
655
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