Gpio Control Registers - Texas Instruments Concerto F28M36 Series Technical Reference Manual

C28 General-Purpose Input/Output (GPIO)
4.2.3 Configuration Overview
The pin function assignments, input qualification, and the external interrupt sources are all controlled by
the GPIO configuration control registers. In addition, you can assign pins to wake the device from the
HALT and STANDBY low power modes and enable/disable internal pullup resistors.
Table 4-37 list the registers that are used to configure the GPIO pins to match the system requirements.
(1)
Name
GPECTRL
GPEQSEL1
GPEMUX1
GPACTRL
GPAQSEL1
GPAQSEL2
GPAMUX1
GPAMUX2
GPADIR
GPBCTRL
GPBQSEL1
GPBQSEL2
GPBMUX1
GPBMUX2
GPBDIR
GPCCTRL
GPCQSEL1
GPCQSEL2
GPCMUX1
GPCMUX2
GPCDIR
GPDCTRL
GPDQSEL1
GPDQSEL2
GPDMUX1
GPDMUX2
GPDDIR
GPDDAT
GPDSET
GPDCLEAR
GPDTOGGLE
GPGCTRL
GPGQSEL1
GPGMUX1
GPGDIR
(1)
An X in a table cell indicates the bit can be 0 or 1.
384
General-Purpose Input/Output (GPIO)
Table 4-36. GPIO Control Registers
Address Size (x16)
0x5F00 2
0x5F02 2
0x5F06 2
0x5F80 2
0x5F82 2
0x5F84 2
0x5F86 2
0x5F88 2
0x5F8A 2
0x5F90 2
0x5F92 2
0x5F94 2
0x5F96 2
0x5F98 2
0x5F9A 2
0x5FA0 2
0x5FA2 2
0x5FA4 2
0x5FA6 2
0x5FA8 2
0x5FAA 2
0x5FB0 2
0x5FB2 2
0x5FB4 2
0x5FB6 2
0x5FB8 2
0x5FBA 2
0x5FD8 4
0x5FDA 4
0x5FDC 4
0x5FDE 4
0x6F80 2
0x6F82 2
0x6F86 2
0x6F8A 2
Copyright © 2012–2019, Texas Instruments Incorporated
Table 4-36
Register Description
GPIO E Control Register (GPIO128 to 135)
GPIO E Qualifier Select 1 Register (GPIO128 to
135)
GPIO E Mux 1 Register (GPIO128 to 135)
GPIO A Control Register (GPIO0 - GPIO31)
GPIO A Qualifier Select 1 Register (GPIO0 -
GPIO15)
GPIO A Qualifier Select 2 Register (GPIO16 -
GPIO31)
GPIO A MUX 1 Register (GPIO0 - GPIO15)
GPIO A MUX 2 Register (GPIO16 - GPIO31)
GPIO A Direction Register (GPIO0 - GPIO31)
GPIO B Control Register (GPIO32 - GPIO63)
GPIO B Qualifier Select 1 Register (GPIO32 -
GPIO47)
GPIO B Qualifier Select 2 Register (GPIO48 -
GPIO63)
GPIO B MUX 1 Register (GPIO32 - GPIO47)
GPIO B MUX 2 Register (GPIO48 - GPIO63)
GPIO B Direction Register (GPIO32 - GPIO63)
GPIO C Control Register (GPIO64 - GPIO95)
GPIO C Qualifier Select 1 Register (GPIO64 -
GPIO79)
GPIO C Qualifier Select 2 Register (GPIO80 - 95)
GPIO C MUX 1 Register (GPIO64 - GPIO79)
GPIO C Mux 2 Register (GPIO80 to 95)
GPIO C Direction Register (GPIO64 - GPIO95)
GPIO D Control Register (GPIO96 to 127)
GPIO D Qualifier Select 1 Register (GPIO96 to
111)
GPIO D Qualifier Select 2 Register (GPIO112 to
127)
GPIO D Mux 1 Register (GPIO96 to 111)
GPIO D Mux 2 Register (GPIO112 to 127)
GPIO D Direction Register (GPIO96 to 127)
GPIO D Data Register (GPIO96 to 127)
GPIO D Data Set Register (GPIO96 to 127)
GPIO D Data Clear Register (GPIO96 to 127)
GPIO D Data Toggle Register (GPIO96 to 127)
GPIO G Control Register (GPIO128 - GPIO135)
GPIO G Qualifier Select 1 Register (GPIO192 -
GPIO199)
GPIO G MUX 1 Register (GPIO192 - GPIO199)
GPIO G Direction Register (GPIO192 - GPIO199)
SPRUHE8E – October 2012 – Revised November 2019
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