SPI Registers and Waveforms
Figure 12-27. CLOCK POLARITY = 1, CLOCK PHASE = 0 (All data transitions are during the falling edge.
1012
C28 Serial Peripheral Interface (SPI)
Inactive level is high.)
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Ch1 Period
199 ns
SPICLK
SPISIMO
SPRUHE8E – October 2012 – Revised November 2019
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