M3 Corrected Error Threshold Register (Mcetres); M3 Corrected Error Threshold Exceeded Flag Register (Mceflg); M3 Corrected Error Threshold Exceeded Force Register (Mcefrc); M3 Corrected Error Threshold Register (Mcetres) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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RAM Control Module Registers

5.2.2.11 M3 Corrected Error Threshold Register (MCETRES)

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 5-38. M3 Corrected Error Threshold Register (MCETRES) Field Descriptions

Figure 5-30. M3 Corrected Error Threshold Exceeded Flag Register (MCEFLG)

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 5-39. M3 Corrected Error Threshold Exceeded Flag Register (MCEFLG) Field Descriptions

Figure 5-31. M3 Corrected Error Threshold Exceeded Force Register (MCEFRC)

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 5-40. M3 Corrected Error Threshold Exceeded Force Register (MCEFRC) Field Descriptions

Internal Memory

Figure 5-29. M3 Corrected Error Threshold Register (MCETRES)

M3 CPU/µDMA Corrected Error Threshold Value

If MCECNTR = MCETRES, correctable error interrupt gets generated if it is enableds in the MCEIE

M3 CPU/µDMA Corrected Error Count Reached Flag

This status flag is set when corrected error count on M3 CPU or µDMA accesses becomes equal to

the M3 CPU/µDMA corrected error threshold.

Once this bit is set, it can be cleared by setting the corresponding error clear bit in the MCECLR

M3 Correctable Error Flag Force. Any read to this bit returns a 0.

Setting this bit to 1 sets the MCEFLG flag in the MCEFLG register.

SPRUHE8E – October 2012 – Revised November 2019

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