Adc Module Block Diagram - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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10.3.2 Block Diagram
Figure 10-10 shows the block diagram of the ADC module.
Reference Voltage Generator
Bandgap
Reference
Circuit
VREFHI
VREFLO
Input Circuit
ADCINA 0
0
ADCINA 1
1
ADCINA 2
2
ADCINA 3
3
ADCINA 4
4
ADCINA 5
5
6
ADCINA 6
7
ADCINA 7
CHSEL[2:0]
ADCINB 0
0
ADCINB 1
1
ADCINB 2
2
ADCINB 3
3
ADCINB 4
4
ADCINB 5
5
0
VREFLO
1 6
ADCINB 6
7
ADCINB 7
ADCCTL1.VREFLOCONV
10.3.3 SOC Principle of Operation
Contrary to previous ADC types, this ADC is not sequencer based. Instead, it is SOC based. The term
SOC is the configuration set defining the single conversion of a single channel. In that set there are three
configurations: the trigger source that starts the conversion, the channel to convert, and the acquisition
(sample) window size. Each SOC is independently configured and can have any combination of the
trigger, channel, and sample window size available. Multiple SOCs can be configured for the same trigger,
channel, and/or acquisition window as desired. This provides a very flexible means of configuring
conversions ranging from individual samples of different channels with different triggers, to oversampling
the same channel using a single trigger, to creating your own series of conversions of different channels
all from a single trigger.
The trigger source for SOCx is configured by a combination of the TRIGSEL field in the ADCSOCxCTL
register, the appropriate bits in the ADCINTSOCSEL1 or ADCINTSOCSEL2 register, and setting the
correct bits in the TRIGxSEL registers. Software can also force an SOC event with the ADCSOCFRC1
register. The channel and sample window size for SOCx are configured with the CHSEL and ACQPS
fields of the ADCSOCxCTL register.
SPRUHE8E – October 2012 – Revised November 2019
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Figure 10-10. ADC Module Block Diagram
Int Gain
Trim
Ext Gain
Trim
1
S/H-A
Converter
CHSEL
ADC Sample
ACQPS
Generation
S/H-B
SOC
Logic
SOC0 – SOC15
Configurations
Copyright © 2012–2019, Texas Instruments Incorporated
ADCCTL1.ADCREFSEL
0
RESULT
Result
Registers
SOC
ADC
EOCx
Interrupt
Logic
Analog Trigger 1
Analog Trigger 2
Analog Trigger 3
Analog Trigger 4
Analog Trigger 5
Analog Trigger 6
Analog Trigger 7
Analog Trigger 8
Analog-to-Digital Converter (ADC)
ADCINT1-8
Analog
Common
Interface
Bus (ACIB)
SW, ePWM,
Timer, GPIO
Analog Subsystem
NVIC
PIE
897