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To receive data in 3-wire master mode, the master must clear the TALK (SPICTL.1) bit to 0 to close the
transmit path and then transmit dummy data in order to initiate the transfer from the slave. Because the
TALK bit is 0, unlike in transmit mode, the master dummy data does not appear on the SPISIMOx pin, and
the master does not receive its own dummy data. Instead, the data from the slave is received by the
master.
Example 12-5. 3-Wire Master Mode Receive
Uint16 rdata;
Uint16 dummy;
SpiaRegs.SPICTL.bit.TALK = 0;
SpiaRegs.SPITXBUF = dummy;
// NOTE: because TALK = 0, data does not tx onto SPISIMOA pin
while(SpiaRegs.SPISTS.bit.INT_FLAG !=1) {} // Wait until data received
rdata = SpiaRegs.SPIRXBUF;
In 3-wire slave mode, SPICLKx, SPISTEx, and SPISOMIx pins must be configured as SPI pins
(SPISIMOx pin can be configured as non-SPI pin). Like in master mode, when transmitting, the slave
receives the data it transmits and must clear this junk data from its receive buffer.
Example 12-6. 3-Wire Slave Mode Transmit
Uint16 data;
Uint16 dummy;
SpiaRegs.SPICTL.bit.TALK = 1;
SpiaRegs.SPITXBUF = data;
while(SpiaRegs.SPISTS.bit.INT_FLAG !=1) {} // Wait until data rx'd
dummy = SpiaRegs.SPIRXBUF;
As in 3-wire master mode, the TALK bit must be cleared to 0. Otherwise, the slave receives data normally.
Example 12-7. - 3-Wire Slave Mode Receive
Uint16 rdata;
SpiaRegs.SPICTL.bit.TALK = 0;
while(SpiaRegs.SPISTS.bit.INT_FLAG !=1) {} // Waits until data rx'd
rdata = SpiaRegs.SPIRXBUF;
12.1.8 SPI STEINV Bit in Digital Audio Transfers
On those devices with 2 SPI modules, enabling the STEINV bit (SPIPRI.1) on one of the SPI modules
allows the pair of SPIs to receive both left and right-channel digital audio data in slave mode. The SPI
module that receives a normal active-low SPISTE signal stores right-channel data, and the SPI module
that receives an inverted active-high SPISTE signal stores left-channel data from the master. To receive
digital audio data from a digital audio interface receiver, the SPI modules can be connected as shown in
Figure
12-10.
SPRUHE8E – October 2012 – Revised November 2019
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// Disable Transmit path
// Send dummy to start tx
// Master reads data
// Enable Transmit path
// Slave transmits data
// Clears junk data from itself
// Disable Transmit path
// Slave reads data
Copyright © 2012–2019, Texas Instruments Incorporated
Enhanced SPI Module Overview
C28 Serial Peripheral Interface (SPI)
997
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