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M-Boot ROM Description
6.5.7.5
M-Boot ROM EMAC Boot Mode Entry Point
When using this boot mode option there is no provision for users to mention an entry point or application
load address because the EMAC bootloader on the device uses BOOTP and TFTP protocols to get the
application data. When using this boot mode, M-Boot ROM by default, begins to load the application data
from the peripheral on to the C2 RAM beginning from the M_BOOT_ROM_RAM_ENTRY_POINT address.
At the end of data transfer, M-Boot ROM branches to the M_BOOT_ROM_RAM_ENTRY_POINT address
to start the application downloaded from the EMAC peripheral.
Please refer to
Section 6.5.15.2
6.5.7.6
M-Boot ROM Parallel Boot Mode Entry Point
When using this boot mode, there is a provision for the user to provide an entry point to tell M-Boot ROM
where to branch to at the end of booting.
This entry point will be referred to as M_BOOT_ROM_PARALLEL_BOOT_MODE_ENTRY_POINT in this
document.
Please refer to
Section 6.5.15.4
6.5.7.7
M-Boot ROM SSI0 Master Boot Mode Entry Point
When using this boot mode, there is a provision for the user to provide an entry point to tell M-Boot ROM
where to branch to at the end of booting. This entry point will be referred to as
M_BOOT_FROM_SSI0_MASTER_MODE_ENTRY_POINT in this document. Please refer to
Section 6.5.15.1.2
6.5.7.8
M-Boot ROM I2C0 Master Boot Mode Entry Point
When using this boot mode, there is a provision for the user to provide an entry point to tell M-Boot ROM
where to branch to at the end of booting. This entry point will be referred to as
M_BOOT_FROM_I2C0_MASTER_MODE_ENTRY_POINT in this document. Please refer to
Section 6.5.15.1.3
6.5.7.9
M-Boot ROM: Boot-to-OTP, OTP EntryPoint
The M-Boot ROM user OTP entry point by default is fixed to 0x68102C in OTP. This location is referred to
as M_BOOT_ROM_OTP_ENTRY_POINT in this document. If a user selects boot-to-OTP boot-mode
option using boot mode GPIO pins, then M-Boot ROM branches to location 0x68102C in OTP. User
applications which use this option must have their main() function located at this address or have a branch
to main() at this location. The boot-to-OTP option should be used if a custom boot loader is desired in the
application.
6.5.8 M-Boot ROM Clock Initialization
On this device, PLL is disabled and bypassed by default on power-up or after an external reset. M-Boot
ROM doesn't enable PLL and keeps it at its default state on power or after an external reset. M-Boot
ROM, however, configures input clocks for both the master subsystem and control subsystem by
modifying the SYSDIVSEL divider and M3SSCLK dividers as below. Please refer to the Clocking section
of the System Control and Interrupts chapter for more details on these clock dividers.
Divider
SYSDIVSEL
M3SSDIVSEL
586
ROM Code and Peripheral Booting
for more details on EMAC bootload protocols.
for more details on PARALLEL boot load protocol.
for more details on SSI0 boot load protocol.
for more details on I2C0 boot load protocol.
Table 6-4. M-Boot ROM Clock Settings
Default on Power up or on External
Divide by 8
(PLLSYSCLK = MainOscClock/8)
Divide by 4
(M3SSCLK = PLLSYSCLK/4)
Copyright © 2012–2019, Texas Instruments Incorporated
reset
Divide by 1
(PLLSYSCLK = MainOscClock/1)
Divide by 1
(M3SSCLK = PLLSYSCLK = MainOscClk)
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
M-Boot ROM setting
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