Register Bit Definitions; Gpio Port A Mux 1 (Gpamux1) Register; Gpio Port A Multiplexing 1 (Gpamux1) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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C28 General-Purpose Input/Output (GPIO)

4.2.7 Register Bit Definitions

The following sections provide descriptive information on the C28 registers.

The GPIO Port A MUX 1 (GPAMUX1) register is shown and described in the figure and table below.

LEGEND- R/W = Read/Write; R = Read only; -n = value after reset

Table 4-51. GPIO Port A Multiplexing 1 (GPAMUX1) Register Field Descriptions

This register is EALLOW protected.

General-Purpose Input/Output (GPIO)

Figure 4-42. GPIO Port A MUX 1 (GPAMUX1) Register

Configure the GPIO15 pin as:

GPIO15 - General purpose input/output 15 (default) (I/O)

EPWM8B - ePWM8 output B (O)

Configure the GPIO14 pin as:

GPIO14 - General purpose I/O 14 (default) (I/O)

EPWM8A - ePWM8 output A (O)

Configure the GPIO13 pin as:

GPIO13 - General purpose I/O 13 (default) (I/O)

EPWM7B - ePWM7 output B (O)

Configure the GPIO12 pin as:

GPIO12 - General purpose I/O 12 (default) (I/O)

EPWM7A - ePWM7 output A (O)

Configure the GPIO11 pin as:

GPIO11 - General purpose I/O 11 (default) (I/O)

EPWM6B - ePWM6 output B (O)

ECAP4 - eCAP4 (I/O)

Configure the GPIO10 pin as:

GPIO10 - General purpose I/O 10 (default) (I/O)

EPWM6A - ePWM6 output A (O)

ADCSOCBO - ADC Start of conversion B (O)

SPRUHE8E – October 2012 – Revised November 2019

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