Analog Subsystem Control Registers (Analogsysctrlreg) - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Analog-to-Digital Converter (ADC)
10.3.12 Analog Subsystem Control Registers
This section contains the analog subsystem registers and bit definitions.
Table 10-26. Analog Subsystem Control Registers (AnalogSysctrlReg)
Register Name
INTOVF
INTOVFCLR
CLOCK
CCIBSTATUS
CCLKCTL
TRIGOVF
TRIGOVFCLR
TRIG1SEL-TRIG8SEL
(1)
This register is EALLOW protected.
Note: CCLKCTL is also addressable from the master subsystem at address 0x400FB814 on the master
subsystem memory map. The register definition is the same on both the subsystems. User software
should make sure that only one subsystem accesses this register at a time. In case of simultaneous writes
by both master and control subsystems at the same time, the master subsystem is given priority and the
control subsystem write is ignored. The reset source for this register is shared resources reset.
926
Analog Subsystem
Address Offset
Size
Description
(x16)
10h
1
ADC Interrupt Overflow Detect
11h
1
ADC Interrupt Overflow Clear
40h
1
Control System: Lock Register
41h
1
Control System: ACIB Status Register
42h
1
Control System: Clock Control
50h
1
ADC Trigger Overflow Detect
51h
1
ADC Trigger Overflow Clear
70h - 77h
1
ADC Trigger 1-8 Input Select
Copyright © 2012–2019, Texas Instruments Incorporated
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SPRUHE8E – October 2012 – Revised November 2019
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