Timing Example For Sequential Mode / Late Interrupt Pulse - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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10.3.13 ADC Timings
Figure 10-49. Timing Example For Sequential Mode / Late Interrupt Pulse
Analog Input
ADCCTL 1.INTPULSEPOS
ADCSOCFLG 1.SOC0
ADCSOCFLG 1.SOC1
ADCSOCFLG 1.SOC2
S/H Window Pulse to Core
ADCRESULT 0
ADCRESULT 1
EOC0 Pulse
EOC1 Pulse
ADCINTFLG .ADCINTx
A
Result 0 latched on this cycle does not include the additional cycles required for the C28x and M3 subsystems to read
the ADC result registers using the ACIB.
SPRUHE8E – October 2012 – Revised November 2019
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SOC0 Sample
Window
0
2
9
ADCCLK
SOC0
Minimum
7 ADCCLKs
Copyright © 2012–2019, Texas Instruments Incorporated
SOC1 Sample
Window
15
22
24
SOC1
2 ADCCLKs
Conversion 0
1 ADCCLK
13 ADC Clocks
6
Minimum
Conversion 1
ADCCLKs
7 ADCCLKs
13 ADC Clocks
Analog-to-Digital Converter (ADC)
SOC2 Sample
Window
37
SOC2
(A)
Result 0 Latched
Analog Subsystem
935

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