Position Counter Reset By Index Pulse For 1000 Line Encoder (Qposmax = 3999 Or 0Xf9F) - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Table of Contents

For example, if the first reset operation occurs on the falling edge of QEPB during the forward direction,

then all the subsequent reset must be aligned with the falling edge of QEPB for the forward rotation and

on the rising edge of QEPB for the reverse rotation as shown in

The position-counter value is latched to the QPOSILAT register and direction information is recorded in

the QEPSTS[QDLF] bit on every index event marker. The position-counter error flag (QEPSTS[PCEF])

and error interrupt flag (QFLG[PCE]) are set if the latched value is not equal to 0 or QPOSMAX. The

position-counter error flag (QEPSTS[PCEF]) is updated on every index event marker and an interrupt flag

(QFLG[PCE]) will be set on error that can be cleared only through software.

The index event latch configuration QEPCTL[IEL] bits are ignored in this mode and position counter error

flag/interrupt flag are generated only in index event reset mode.

Figure 9-8. Position Counter Reset by Index Pulse for 1000 Line Encoder (QPOSMAX = 3999 or 0xF9F)

Index interrupt/

Position Counter Reset on Maximum Position (QEPCTL[PCRM]=01)

If the position counter is equal to QPOSMAX, then the position counter is reset to 0 on the next eQEP

clock for forward movement and position counter overflow flag is set. If the position counter is equal to

ZERO, then the position counter is reset to QPOSMAX on the next QEP clock for reverse movement and

position counter underflow flag is set.

The first index marker fields (QEPSTS[FIDF] and QEPSTS[FIMF]) are not applicable in this mode.

SPRUHE8E – October 2012 – Revised November 2019

Submit Documentation Feedback

9-9shows the position counter reset operation in this mode.

Position Counter and Control Unit (PCCU)

C28 Enhanced QEP (eQEP) Module

Chapters

Table of Contents