Gpio Mux-To-Trip Input Connectivity - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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0 = PU disabled (reset value)
1 = PU enabled
PU GPIOPUR
Async/
Sync
Sync + Qual
GPIO0
GPIO63
Async/
Sync
Sync + Qual
PU GPIOPUR
ECAP1
ECAP2
ECAP3
ECAP4
ECAP5
ECAP6
XINT1
C28
XINT2
PIE
XINT3
SYNCIN
ePWM
Trip-Zone (TZ)
ADC
Submodule
Any of the 64 GPIO pins can be flexibly mapped to be the trip-zone input or trip inputs to the EPWM trip-
zone sub-module and EPWM digital compare sub-module. Refer to the EPWM chapter for more
information. Any of the 64 GPIO pins can also be mapped to three external interrupts. The GPIO Trip
Input Select (GPTRIPxSEL) register defines which GPIO pins get assigned the functionality described
above. Refer to the GPIO chapter for more information. The GPTRIPxSEL register must also be used to
allow ECAP modules to capture data on a pin. Refer to the ECAP chapter for more information.
SPRUHE8E – October 2012 – Revised November 2019
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Figure 4-39. GPIO MUX-to-Trip Input Connectivity
GPIO0.trip
0 0 0 0
63 63 63 63
GPIO63.trip
GPTRIP1 GPTRIP2 GPTRIP3
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
0 0 0
63 63 63
GPTRIP4 GPTRIP5 GPTRIP6 GPTRIP7
Digital Compare (DC) Submodule
EPWM1 Module
EPWM2 Module
EPWM3 Module
EPWMx Module
General-Purpose Input/Output (GPIO)
0 0 0 0
63 63 63 63
GPTRIP8 GPTRIP9 GPTRIP10 GPTRIP11
0
63
GPTRIP12
383