I2C Module Data Transfer (7-Bit Addressing With 8-Bit Data Configuration Shown); I2C Module 7-Bit Addressing Format (Fdf = 0, Xa = 0 In I2Cmdr); I2C Module 10-Bit Addressing Format (Fdf = 0, Xa = 1 In I2Cmdr); I2C Module Free Data Format (Fdf = 1 In I2Cmdr) - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Figure 14-6. I2C Module Data Transfer (7-Bit Addressing with 8-bit Data Configuration Shown)
SDA
MSB
SCL
1
START
condition (S)
Figure 14-7. I2C Module 7-Bit Addressing Format (FDF = 0, XA = 0 in I2CMDR)
1
7
x x x x x x x
S
7 bits of slave address
Figure 14-8. I2C Module 10-Bit Addressing Format (FDF = 0, XA = 1 in I2CMDR)
1
7
S 1 1 1 1 0 x x
x x = 2 MSBs
Figure 14-9. I2C Module Free Data Format (FDF = 1 in I2CMDR)
1
n
S Data
14.2.5.1 7-Bit Addressing Format
In the 7-bit addressing format (see
bit slave address followed by a R/W bit. R/W determines the direction of the data:
• R/W = 0: The master writes (transmits) data to the addressed slave.
• R/W = 1: The master reads (receives) data from the slave.
An extra clock cycle dedicated for acknowledgment (ACK) is inserted after each byte. If the ACK bit is
inserted by the slave after the first byte from the master, it is followed by n bits of data from the transmitter
(master or slave, depending on the R/W bit). n is a number from 1 to 8 determined by the bit count (BC)
field of I2CMDR. After the data bits have been transferred, the receiver inserts an ACK bit.
To select the 7-bit addressing format, write 0 to the expanded address enable (XA) bit of I2CMDR, and
make sure the free data format mode is off (FDF = 0 in I2CMDR).
14.2.5.2 10-Bit Addressing Format
The 10-bit addressing format (see
sends the slave address in two separate byte transfers. The first byte consists of 11110b, the two MSBs of
the 10-bit slave address, and R/W = 0 (write). The second byte is the remaining 8 bits of the 10-bit slave
address. The slave must send acknowledgment after each of the two byte transfers. Once the master has
written the second byte to the slave, the master can either write data or use a repeated START condition
to change the data direction. For more details about using 10-bit addressing, see the Philips
Semiconductors I2C-bus specification.
To select the 10-bit addressing format, write 1 to the XA bit of I2CMDR and make sure the free data
format mode is off (FDF = 0 in I2CMDR).
SPRUHE8E – October 2012 – Revised November 2019
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Acknowledgement
bit from slave
2 7 8
Slave address R/W ACK
1 1
R/W ACK
1 1
ACK x x x x x x x x
R/W
8 LSBs of slave address
1
ACK Data
Figure 14-7), the first byte after a START condition (S) consists of a 7-
Figure 14-8) is similar to the 7-bit addressing format, but the master
Copyright © 2012–2019, Texas Instruments Incorporated
9 1 2
Data
1
n
Data ACK
1
8
ACK
1
n
ACK
I2C Module Operational Details
(No-)Acknowledgement
bit from receiver
8 9
STOP
ACK
condition (P)
1
n
Data ACK P
1
n
Data ACK
1
n
Data ACK P
C28 Inter-Integrated Circuit Module
1
1
P
1
1051