Timing Example For Simultaneous Mode / Late Interrupt Pulse - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Figure 10-51. Timing Example For Simultaneous Mode / Late Interrupt Pulse

Analog Input A

Analog Input B

ADCCTL1.INTPULSEPOS

ADCSOCFLG 1.SOC0

ADCSOCFLG 1.SOC1

ADCSOCFLG 1.SOC2

S/H Window Pulse to Core

ADCINTFLG .ADCINTx

Result 0 (A) and Result 0 (B) latched on their respective cycles does not include the additional cycles required for the

C28x and M3 subsystems to read the ADC result registers using the ACIB.

SPRUHE8E – October 2012 – Revised November 2019

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Conversion 0 (A)

13 ADC Clocks

Result 0 (A) Latched

Conversion 0 (B)

13 ADC Clocks

Analog-to-Digital Converter (ADC)

Result 0 (B) Latched

Conversion 1 (A)

13 ADC Clocks

Analog Subsystem

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