M3 Corrected Error Threshold Exceeded Flag Clear Register (Mceclr); M3 Single Error Interrupt Enable Register (Mceie); M3 Corrected Error Threshold Exceeded Flag Clear Register (Mceclr) Field Descriptions; M3 Single Error Interrupt Enable Register (Mceie) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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5.2.2.14 M3 Corrected Error Threshold Exceeded Flag Clear Register (MCECLR)

Figure 5-32. M3 Corrected Error Threshold Exceeded Flag Clear Register (MCECLR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-41. M3 Corrected Error Threshold Exceeded Flag Clear Register (MCECLR) Field
Bit Field
31-1 Reserved
0 MCECLR

5.2.2.15 M3 Single Error Interrupt Enable Register (MCEIE)

31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-42. M3 Single Error Interrupt Enable Register (MCEIE) Field Descriptions
Bit Field
31-1 Reserved
0 MCEIE
SPRUHE8E – October 2012 – Revised November 2019
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Reserved
R-0
Value Description
Reserved
M3 Corrected Error Threshold Reached Error Flag Clear. Any reads to this bit will return a 0.
Writing a 1 to this bit clears the M3 corrected error threshold reached flag.
It will also clear the MCECNTR register.
Figure 5-33. M3 Single Error Interrupt Enable Register (MCEIE)
Reserved
R-0
Value Description
Reserved
M3 CPU/µDMA Correctable Error Interrupt Enable
0 Correctable error interrupt is not generated even though the MCEFLG flag is set.
1 Correctable error interrupt is generated when the MCEFLG flag is set.
Copyright © 2012–2019, Texas Instruments Incorporated
Descriptions
RAM Control Module Registers
1 0
MCECLR
R/W=1-0
1 0
MCEIE
R/W-0
Internal Memory
501