Up-Down-Count, Dual Edge Symmetric Waveform, With Independent Modulation On Epwmxa And Epwmxb - Complementary - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Figure 7-28. Up-Down-Count, Dual Edge Symmetric Waveform, With Independent Modulation on
TBCTR
TBPRD
value
EPWMxA
EPWMxB
A
PWM period = 2 × TBPRD × T
B
Duty modulation for EPWMxA is set by CMPA, and is active low, i.e., low time duty proportional to CMPA
C
Duty modulation for EPWMxB is set by CMPB and is active high, i.e., high time duty proportional to CMPB
D
Outputs EPWMx can drive upper/lower (complementary) power switches
E
Dead-band = CMPB - CMPA (fully programmable edge placement by software). Note the dead-band module is also
available if the more classical edge delay method is required.
Example 7-5
contains a code sample showing initialization and run time for the waveforms in
Use the code in
Example 7-5
Example 7-5. Code Sample for
// Initialization Time
// = = = = = = = = = = = = = = = = = = = = = = = =
EPwm1Regs.TBPRD = 600;
EPwm1Regs.CMPA.half.CMPA = 350;
EPwm1Regs.CMPB = 400;
EPwm1Regs.TBPHS = 0;
EPwm1Regs.TBCTR = 0;
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Symmetric
EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // load on CTR = Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // load on CTR = Zero
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBD = AQ_SET;
// Run Time
// = = = = = = = = = = = = = = = = = = = = = = = =
EPwm1Regs.CMPA.half.CMPA = Duty1A;
EPwm1Regs.CMPB = Duty1B;
SPRUHE8E – October 2012 – Revised November 2019
Submit Documentation Feedback
EPWMxA and EPWMxB — Complementary
CA
CA
CB
CB
TBCLK
to define the headers.
Figure 7-28
// Period = 2´600 TBCLK counts
// Compare A = 350 TBCLK counts
// Compare B = 400 TBCLK counts
// Set Phase register to zero
// clear TB counter
// Phase loading disabled
// TBCLK = SYSCLKOUT
// adjust duty for output EPWM1A
// adjust duty for output EPWM1B
Copyright © 2012–2019, Texas Instruments Incorporated
CA
C28 Enhanced Pulse Width Modulator (ePWM) Module
ePWM Submodules
CA
CB
CB
Figure
7-28.
711

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