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TBCLK
CTR = PRD
or CTR = 0
Offset(n)
BLANKWDW
BLANKWDW
BLANKWDW
SPRUHE8E – October 2012 – Revised November 2019
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Figure 7-54. Blanking Window Timing Diagram
Period
Window(n)
Offset(n)
Offset(n)
Copyright © 2012–2019, Texas Instruments Incorporated
Offset(n+1)
Offset(n+1)
Window(n)
Offset(n+1)
Window(n)
C28 Enhanced Pulse Width Modulator (ePWM) Module
ePWM Submodules
Window(n+1)
Window(n+1)
Window(n+1)
743