Gpio And Peripheral Multiplexing (Mux) - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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4.2.6 GPIO and Peripheral Multiplexing (MUX)

Up to three different peripheral functions are multiplexed along with a general input/output (GPIO) function
per pin. This allows you to pick and choose a peripheral mix that will work best for the particular
application.
Table 4-44 and Table 4-45
pin. The second column indicates the I/O name of the pin on the device. Since the I/O name is unique, it
is the best way to identify a particular pin. Therefore, the register descriptions in this section only refer to
the GPIO name of a particular pin. The MUX register and particular bits that control the selection for each
pin are indicated in the first column.
For example, the multiplexing for the GPIO6 pin is controlled by writing to GPAMUX[13:12]. By writing to
these bits, the pin is configured as either GPIO6, or one of up to three peripheral functions. The GPIO6
pin can be configured as follows:
GPAMUX1[13:12] Bit Setting
If GPAMUX1[13:12] = 0,0
If GPAMUX1[13:12] = 0,1
If GPAMUX1[13:12] = 1,0
If GPAMUX1[13:12] = 1,1
NOTE: If you should select a reserved GPIO MUX configuration that is not mapped to a peripheral,
the state of the pin will be undefined and the pin may be driven. Reserved configurations are
for future expansion and should not be selected. In the device MUX tables, these options are
indicated as Reserved .
Some peripherals can be assigned to more than one pin via the MUX registers. For example, the ECAP1
can be assigned to either the GPIO5 or GPIO24 pin, depending on individual system requirements as
shown below:
Signal Pin Assigned to SPISIMOB
If no pin is configured as an input to a peripheral, or if more than one pin is configured as an input for the
same peripheral, then the input to the peripheral will either default to a 0 or a 1 as shown in
For example, if ECAP1 was assigned to both GPIO5 and GPIO24, the input to the ECAP1 peripheral
would default to a high state as shown in
GPIO24.
SPRUHE8E – October 2012 – Revised November 2019
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show an overview of the possible multiplexing combinations sorted by GPIO
Choice 1 GPIO5
or Choice 2 GPIO24
Table 4-43
Copyright © 2012–2019, Texas Instruments Incorporated
C28 General-Purpose Input/Output (GPIO)
Pin Functionality Selected
Pin configured as GPIO6
Pin configured as EPWM4A (O)
Reserved
Pin configured as EPWMSYNCO (O)
MUX Configuration
GPAMUX[11:10] = 1,1
GPAMUX2[17:16] = 0,1
and the input would not be connected to GPIO5 or
General-Purpose Input/Output (GPIO)
Table 4-43.
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