Time-Base Counter Synchronization Scheme 4 - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Time-Base Period Immediate Load Mode:

If immediate load mode is selected (TBCTL[PRDLD] = 1), then a read from or a write to the TBPRD

memory address goes directly to the active register.

7.2.2.3.2 Time-Base Clock Synchronization

The TBCLKSYNC bit in the peripheral clock enable registers allows all users to globally synchronize all

enabled ePWM modules to the time-base clock (TBCLK). When set, all enabled ePWM module clocks are

started with the first rising edge of TBCLK aligned. For perfectly synchronized TBCLKs, the prescalers for

each ePWM module must be set identically.

The proper procedure for enabling ePWM clocks is as follows:

1. Enable ePWM module clocks in the PCLKCRx register

2. Set TBCLKSYNC= 0

3. Configure ePWM modules

4. Set TBCLKSYNC=1

Time-Base Counter Synchronization

A time-base synchronization scheme connects all of the ePWM modules on a device. Each ePWM

module has a synchronization input (EPWMxSYNCI) and a synchronization output (EPWMxSYNCO). The

input synchronization for the first instance (ePWM1) comes from an external pin.

NOTE: All modules shown in the synchronization schemes may not be available on all devices.

Please refer to the device specific data manual to determine which modules are available on

a particular device.

SPRUHE8E – October 2012 – Revised November 2019

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Figure 7-7. Time-Base Counter Synchronization Scheme 4

C28 Enhanced Pulse Width Modulator (ePWM) Module

ePWM Submodules

GPIO0 . . . GPIO63

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