Gpio Port B Set, Clear And Toggle (Gpbset, Gpbclear, Gpbtoggle) Registers; Gpio Port B Set (Gpbset) Register Field Descriptions; Gpio Port B Clear (Gpbclear) Register Field Descriptions; Gpio Port B Toggle (Gpbtoggle) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Table of Contents

Advertisement

C28 General-Purpose Input/Output (GPIO)

4.2.7.46 GPIO Port B Set, Clear and Toggle (GPBSET, GPBCLEAR, GPBTOGGLE) Registers

The GPIO Port B Set, Clear and Toggle (GPBSET, GPBCLEAR, GPBTOGGLE) registers are shown and
described in the figure and table below.
Figure 4-87. GPIO Port B Set, Clear and Toggle (GPBSET, GPBCLEAR, GPBTOGGLE) Registers
31
30
GPIO63
GPIO62
R/W-x
R/W-x
23
22
GPIO55
GPIO54
R/W-x
R/W-x
15
14
GPIO47
GPIO46
R/W-x
R/W-x
7
6
GPIO39
GPIO38
R/W-x
R/W-x
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-98. GPIO Port B Set (GPBSET) Register Field Descriptions
Bits
Field
31-0
GPIO63 -GPIO32
Table 4-99. GPIO Port B Clear (GPBCLEAR) Register Field Descriptions
Bits
Field
31-0
GPIO63 -GPIO32
Table 4-100. GPIO Port B Toggle (GPBTOGGLE) Register Field Descriptions
Bits
Field
31-0
GPIO63 -GPIO32
454
General-Purpose Input/Output (GPIO)
29
28
GPIO61
GPIO60
R/W-x
R/W-x
21
20
GPIO53
GPIO52
R/W-x
R/W-x
13
12
GPIO45
GPIO44
R/W-x
R/W-x
5
4
GPIO37
GPIO36
R/W-x
R/W-x
Value
Each GPIO port B pin (GPIO32-GPIO63) corresponds to one bit in this register.
0
Writes of 0 are ignored. This register always reads back a 0.
1
Writing a 1 forces the respective output data latch to high. If the pin is configured as a GPIO
output then it will be driven high. If the pin is not configured as a GPIO output then the latch is
set but the pin is not driven.
Value
Each GPIO port B pin (GPIO32-GPIO63) corresponds to one bit in this register.
0
Writes of 0 are ignored. This register always reads back a 0.
1
Writing a 1 forces the respective output data latch to low. If the pin is configured as a GPIO
output then it will be driven low. If the pin is not configured as a GPIO output then the latch is
cleared but the pin is not driven.
Value
Each GPIO port B pin (GPIO32-GPIO63) corresponds to one bit in this register.
0
Writes of 0 are ignored. This register always reads back a 0.
1
Writing a 1 forces the respective output data latch to toggle from its current state. If the pin is
configured as a GPIO output then it will be driven in the opposite direction of its current state. If
the pin is not configured as a GPIO output then the latch is cleared but the pin is not driven.
Copyright © 2012–2019, Texas Instruments Incorporated
27
26
GPIO59
GPIO58
R/W-x
R/W-x
19
18
GPIO51
GPIO50
R/W-x
R/W-x
11
10
GPIO43
GPIO42
R/W-x
R/W-x
3
2
GPIO35
GPIO34
R/W-x
R/W-x
Description
Description
Description
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
25
24
GPIO57
GPIO56
R/W-x
R/W-x
17
16
GPIO49
GPIO48
R/W-x
R/W-x
9
8
GPIO41
GPIO40
R/W-x
R/W-x
1
0
GPIO33
GPIO32
R/W-x
R/W-x
Submit Documentation Feedback

Advertisement

Table of Contents
loading

Table of Contents