M-Boot Rom Ram Usage; M-Boot Rom User Otp; Rev0, Reva, Revf - User Configurable Dcsm Otp Fields - Texas Instruments Concerto F28M36 Series Technical Reference Manual

M-Boot ROM Description

6.5.5 M-Boot ROM RAM Usage

M-Boot ROM uses part of C2 RAM, which is unsecured memory for stack, data and to log boot status.
The first 0x900 bytes from start of C2 RAM start address (0x20004000) is reserved for boot ROM.
Applications are free to reuse this memory after boot ROM execution is completed. However, that this part
of C2 RAM will be zero-initialized by M-Boot ROM if it is rerun because of a reset which occurs while the
application is running. In other words, if an application is using the first 0x900 bytes of C2 RAM, then it
cannot expect the contents to be preserved between resets. This is extremely important for a debugger
reset and software reset.
6.5.5.1 M-Boot ROM Stack
The C2 memory range 0x20004584 to 0x20004900 is allocated for the M-Boot ROM stack.
6.5.5.2 M-Boot ROM Data Section
The M-Boot ROM data section is located in C2 memory from address 0x20004004 to 0x20004583.
6.5.5.3 M-Boot ROM Boot Status
The first location in C2 RAM is reserved by M-Boot ROM boot status. This location is used for boot ROM
to log status of different events that occur in the system during boot and applications can use this status to
take necessary actions.
This location is preserved during master subsystem SW and debugger resets unlike the boot ROM data
and stack memory range which is zero-initialized for these resets.
User applications can reuse this memory location after it reads the device boot status or it can leave this
location reserved if there is a need to preserve boot status between resets.
Note that M-Boot ROM itself doesn't use this boot status for any purpose this is only provided to let
applications know about it.
More details on the boot status is given in

6.5.6 M-Boot ROM User OTP

The boot ROM user configurable DCSM OTP field descriptions and memory addresses are detailed in
Table 6-3. Each field is provided with a description of its purpose and associated ECC information..
Table 6-3. REV0, REVA, REVF - User Configurable DCSM OTP Fields
Address
0x68 0810 - 0x68 0813
0x68 0813 - 0x68 0817
0x68 1000 - 0x68 1003
0x68 1004 - 0x68 1007
0x68 1008 - 0x68 100B
0x68 100C - 0x68 100F
0x68 1010 - 0x68 1013
0x68 1014 - 0x68 1017
0x68 1018 - 0x68 101B
0x68 101C - 0x68 101F
0x68 1020 - 0x68 1023
0x68 1024 - 0x68 1027
0x68 1028 - 0x68 102B
0x68 102C - 0x68 102F
584
ROM Code and Peripheral Booting
Section 6.5.12.
Description
EMAC REG0 Address
EMAC REG1 Address
OTP - Security Lock
Reserved
Reserved
OTP - Z2 FLASH ENTRY POINT
Reserved
Reserved
Reserved
Main Oscillator Clock Frequency
Reserved
Reserved
Reserved
OTP ENTRY POINT
Copyright © 2012–2019, Texas Instruments Incorporated
Notes
ECC is shared for these locations, so they must be
programmed at the same time.
ECC is shared for these locations, so they must be
programmed at the same time.
ECC is shared for these locations, so they must be
programmed at the same time.
ECC is shared for these locations, so they must be
programmed at the same time.
ECC is shared for these locations, so they must be
programmed at the same time.
ECC is shared for these locations, so they must be
programmed at the same time.
ECC is shared for these locations, so they must be
programmed at the same time.
SPRUHE8E – October 2012 – Revised November 2019
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