C-Boot Rom Entry Point - Texas Instruments Concerto F28M36 Series Technical Reference Manual

C-Boot ROM Description
6.6.5 C-Boot ROM Entry Points
This section gives details about the entry point addresses for various boot modes supported by C-Boot
ROM. These entry points tell C-Boot ROM where to branch to at the end of booting as per boot mode
selected.
Name
C_BOOTROM_FLASH_ENTRY_POINT
C_BOOTROM_RAM_ENTRY_POINT
C_BOOTROM_SCI_ENTRY_POINT
C_BOOTROM_SPI_ENTRY_POINT
C_BOOTROM_I2C_ENTRY_POINT
C_BOOTROM_PARALLEL_ENTRY_POINT
6.6.5.1 C-Boot ROM Boot-to-RAM Entry Point
C-Boot ROM Ram entry point by default is fixed to 0x00000000 in M0 RAM. This location will be referred
to as C_BOOTROM_RAM_ENTRY_POINT further in this document.
This means if the master subsystem application sends a boot to RAM IPC command, then C-Boot ROM
branches to location 0x00000000 in M0 RAM. User applications which use this option must have their
main function located at this address or have a branch to main() instruction at this location.
The boot to RAM option is mainly helpful during code development.
6.6.5.2 C-Boot ROM Boot-to-Flash Entry Point
C-Boot ROM Flash entry point by default is fixed at 0x0013FFF0, this means that whenever C-Boot ROM
receive a Boot to flash boot mode IPC command from master subsystem it will branch to this location and
begins executing the code. User applications which use this option must have their main function( first
function to be called to begin application execution) located at this address or have a branch to main()
instruction at this location.
NOTE: On a device with erased C-Flash, choosing this option will trigger an ITRAP exception to the
C28x CPU. Please refer to the C-Boot ROM exceptions and interrupt handling section of this
chapter for more details on how this is handled in C-Boot ROM.
6.6.5.3 C-Boot ROM SCI-Boot Entry Point
Entry point in this boot mode will be provided by the user or host system which is sending boot code to the
device. Please refer to Serial Boot Data format for more details.
6.6.5.4 C-Boot ROM SPI-Boot Entry Point
Entry point in this boot mode will be provided by the user or host system which is sending boot code to the
device. Please refer to SPI Boot Data format for more details.
6.6.5.5 C-Boot ROM I2C-Boot Entry Point
Entry point in this boot mode will be provided by the user or host system which is sending boot code to the
device. Please refer to I2C Boot Data format for more details.
622
ROM Code and Peripheral Booting
Table 6-16. C-Boot ROM Entry Point
Address
0x13FFF0
0x000000
N/A
N/A
N/A
N/A
Copyright © 2012–2019, Texas Instruments Incorporated
Size (x4) Description
2 Flash entry point for boot-to-flash option
2 RAM entry point for boot to RAM option
2 Entry point will be provided by the user or
Host system using the SCI boot mode option
2 Entry point will be provided by the user or
Host system using the SPI boot mode option
2 Entry point will be provided by the user or
Host system using the I2C boot mode option
3 Entry point will be provided by the user or
Host system using the parallel boot mode
option
SPRUHE8E – October 2012 – Revised November 2019
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