Analog I/O Dat (Aiodat) Register; Analog I/O Dat (Aiodat) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

C28 General-Purpose Input/Output (GPIO)

4.2.7.44 Analog I/O DAT (AIODAT) Register

The Analog I/O DAT (AIODAT) register is shown and described in the figure and table below.
31 30
Reserved AIO30
R-0 R/W-x
23 22
Reserved AIO22
R-0 R/W-x
15 14
Reserved AIO14
R-0 R/W-x
7 6
Reserved AIO6
R-0 R/W-x
LEGEND: R/W = Read/Write; R = Read only; -n = value after resetR/W-x
Bit Field
31-0 AIOn
452
General-Purpose Input/Output (GPIO)
Figure 4-85. Analog I/O DAT (AIODAT) Register
29 28
Reserved AIO28
R-0 R/W-x
21 20
Reserved AIO20
R-0 R/W-x
13 12
Reserved AIO12
R-0
R/W-x
5 4
Reserved AIO4
R-0 R/W-x
Table 4-94. Analog I/O DAT (AIODAT) Register Field Descriptions
Value Description
Each bit corresponds to one AIO port pin
0 Reading a 0 indicates that the state of the pin is currently low, irrespective of the mode for which
the pin is configured.
Writing a 0 will force an output of 0 if the pin is configured as a AIO output in the appropriate
registers; otherwise, the value is latched but not used to drive the pin.
1 Reading a 1 indicates that the state of the pin is currently high irrespective of the mode for which
the pin is configured.
Writing a 1will force an output of 1if the pin is configured as a AIO output in the appropriate
registers; otherwise, the value is latched but not used to drive the pin.
Copyright © 2012–2019, Texas Instruments Incorporated
27 26
Reserved AIO26
R-0 R/W-x
19 18
Reserved AIO18
R-0
R/W-x
11 10
Reserved AIO10
R-0 R/W-x
3 2
Reserved AIO2
R-0 R/W-x
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
25 24
Reserved
R-0
17 16
Reserved
R-0
9 8
Reserved
R-0
1 0
Reserved
R-0
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