Single-Cycle Write Access, Frm50 = 0, Frmcnt = 0, Wr2Cyc; Two-Cycle Read, Write Accesses, Frm50 = 0, Frmcnt = 0, Rd2Cyc = 1, Wr2Cyc = 1; Read Accesses, Frm50 = 0, Frmcnt = 0, Rd2Cyc = 1 - Texas Instruments Concerto F28M36 Series Technical Reference Manual

General-Purpose Mode
Figure 17-15. Single-Cycle Write Access, FRM50 = 0, FRMCNT = 0, WR2CYC = 0
Figure 17-16. Two-Cycle Read, Write Accesses, FRM50 = 0, FRMCNT = 0, RD2CYC = 1, WR2CYC = 1
CLOCK
( )
EPI0S31
FRAME
(EPI0S30)
RD
( )
EPI0S29
WR
( )
EPI0S28
Address
Data
Figure 17-17. Read Accesses, FRM50 = 0, FRMCNT = 0, RD2CYC = 1
CLOCK
( )
EPI0S31
FRAME
(EPI0S30)
RD
( )
EPI0S29
WR
( )
EPI0S28
Address
Data
1256
External Peripheral Interface (EPI)
Clock
( )
EPI0S31
Frame
(EPI0S30)
RD
( )
EPI0S29
WR
( )
EPI0S28
Address
Data
Data
Read
Addr1 Addr2
Data1
Copyright © 2012–2019, Texas Instruments Incorporated
Data
Data
Write
Addr3
Data2 Data3
SPRUHE8E – October 2012 – Revised November 2019
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