M-Boot Rom Gpio Assignments For Each Boot Mode; M-Boot Rom Boot Mode Gpio Assignments - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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M-Boot ROM modifies the dividers as shown in
input to reset the master subsystem, except for a debugger reset or software reset. Refer to the Resets
section in the System Control and Interrupts chapter for further discussion.
NOTE: Configuring the above dividers make a master subsystem and control subsystem RUN at the
same frequency which is equal to MAINOSC frequency selected by user. So users should be
aware of this fact while selecting a MAINOSC clock frequency. Remember that PLL is by
passed during normal boot.

6.5.9 M-Boot ROM GPIO Assignments for Each Boot Mode

The table below gives information on the GPIOs used for each boot mode on M-Boot ROM. More details
on the boot mode are provided further in this document.
M-Boot ROM Peripheral
Boot Mode
Serial Boot UART0
Mode
(boot mode 2)
I2C0
SSI0
Parallel Boot GPIO (s)
Mode
(boot mode 0)
CAN Boot CAN0
Mode
SPRUHE8E – October 2012 – Revised November 2019
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Table 6-4
Table 6-5. M-Boot ROM Boot Mode GPIO Assignments
Boot Direction
Function
Name for pin
UART0_RX Input
UART0_TX Ouput
I2C0_CLK Input
I2C_DATA BI-Directional
SSI0_CS Input
SSI0_CLK Input
SSI0_TX Output
SSI0_RX Input
D0 Input
D1 Input
D2 Input
D3 Input
D4 Input
D5 Input
D6 Input
D7 Input
HOST_CTRL Input
DSP_CTRL Ouput
CAN0_RX Input
Copyright © 2012–2019, Texas Instruments Incorporated
for all the reset types that pull external reset
GPIO(s) used Pin Mux Assignment
Peripheral
Mode
PA0_GPIO0 1
PA1_GPIO1 1
PB2_GPIO10 1
PB3_GPIO11 1
PA3_GPIO3 1
PA2_GPIO2 1
PA5_GPIO5 1
PA4_GPIO4 1
PA0_GPIO0 0(default)
PA1_GPIO1 0(default)
PA2_GPIO2 0(default)
PA3_GPIO3 0(default)
PA4_GPIO4 0(default)
PA5_GPIO5 0(default)
PB0_GPIO8 0(default)
PB1_GPIO9 0(default)
PE3_GPIO27 0(default)
PE2_GPIO26 0(default)
PB4_GPIO12 5
ROM Code and Peripheral Booting
M-Boot ROM Description
Alternate Core Select
Mode
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
0(default) Master(default
)
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