Adc Registers; Adc Configuration And Control Registers (Adcregs And Adcresult) - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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10.3.11 ADC Registers

This section contains the ADC registers and bit definitions with the registers grouped by function. All of the
ADC registers are located in Peripheral Frame 2 except the ADCRESULTx registers, which are found in
Peripheral Frame 0. See the device datasheet for specific addresses.
Register Name
ADC1
ADC2
ADC1 Results
ADC2 Results
ADC1 Results M3
ADC2 Results M3
(1)
The second set of ADC result registers are mapped to the M3 memory space. This gives both cores access to the ADC
conversion results.
Table 10-5. ADC Configuration and Control Registers (AdcRegs and AdcResult):
Register Name
ADCCTL1
ADCCTL2
ADCINTFLG
ADCINTFLGCLR
ADCINTOVF
ADCINTOVFCLR
INTSEL1N2
INTSEL3N4
INTSEL5N6
INTSEL7N8
SOCPRICTL
ADCSAMPLEMODE
ADCINTSOCSEL1
ADCINTSOCSEL2
ADCSOCFLG1
ADCSOCFRC1
ADCSOCOVF1
ADCSOCOVFCLR1
ADCSOC0CTL - ADCSOC15CTL
ADCREFTRIM
ADCOFFTRIM
ADCREV – reserved
ADCRESULT0 - ADCRESULT15
(1)
This register is EALLOW protected.
(2)
The base address of the ADCRESULT registers differs from the base address of the other ADC registers. In the header files, the
ADCRESULT registers are found in the AdcResult register file, not AdcRegs.
SPRUHE8E – October 2012 – Revised November 2019
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Table 10-4. ADC Registers
Address Offset Size Description
(x16)
7100h - 7174h 1 Analog-to-Digital Converter 1
7180h - 71FFh 1 Analog-to-Digital Converter 2
0B00h - 0B0Fh 1 Analog-to-Digital Converter 1 Results
0B40h - 0B4Fh 1 Analog-to-Digital Converter 2 Results
5000 1600h - 5000 1 Analog-to-Digital Converter 1 Results (M3)
161Fh
5000 1680h - 5000 1 Analog-to-Digital Converter 2 Results (M3)
168Fh
Address Offset Size Description
(x16)
00h 1 Control 1 Register
01h 1 Control 2
04h 1 Interrupt Flag Register
05h 1 Interrupt Flag Clear Register
06h 1 Interrupt Overflow Register
07h 1 Interrupt Overflow Clear Register
08h 1 Interrupt 1 and 2 Selection Register
09h 1 Interrupt 3 and 4 Selection Register
0Ah 1 Interrupt 5 and 6 Selection Register
0Bh 1 Interrupt 7 and 8 Selection Register
10h 1 SOC Priority Control Register
12h 1 Sampling Mode Register
14h 1 Interrupt SOC Selection 1 Register (for 8 channels)
15h 1 Interrupt SOC Selection 2 Register (for 8 channels)
18h 1 SOC Flag 1 Register (for 16 channels)
1Ah 1 SOC Force 1 Register (for 16 channels)
1Ch 1 SOC Overflow 1 Register (for 16 channels)
1Eh 1 SOC Overflow Clear 1 Register (for 16 channels)
20h - 2Fh 1 SOC0 Control Register to SOC15 Control Register
40h 1 Reference Trim Register
41h 1 Offset Trim Register
4Fh 1 Revision Register
(2)
00h - 0Fh 1 ADC Result 0 Register to ADC Result 15 Register
Copyright © 2012–2019, Texas Instruments Incorporated
Analog-to-Digital Converter (ADC)
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