Priority Control Register 1 (Priorityctrl1); Priority Control Register 1 (Priorityctrl1) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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11.8.4 Priority Control Register 1 (PRIORITYCTRL1) — EALLOW Protected
The priority control register 1 (PRIORITYCTRL1) is shown in
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-6. Priority Control Register 1 (PRIORITYCTRL1) Field Descriptions
Bit Field
15-1 Reserved
0 CH1PRIORITY
SPRUHE8E – October 2012 – Revised November 2019
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Figure 11-11. Priority Control Register 1 (PRIORITYCTRL1)
Reserved
R-0
Value Description
Reserved
DMA Ch1 Priority: This bit selects whether channel 1 has higher priority or not:
0 Same priority as all other channels
1 Highest priority channel
Channel priority can only be changed when all channels are disabled. A priority reset should
be performed before restarting channels after changing priority.
Copyright © 2012–2019, Texas Instruments Incorporated
Figure 11-11 and described in
1
C28 Direct Memory Access (DMA) Module
Register Descriptions
Table 11-6.
0
CH1
PRIORITY
R/W-0
967