M-Boot Rom Reset Cause Handling; M-Boot Rom Exceptions Handling - Texas Instruments Concerto F28M36 Series Technical Reference Manual

M-Boot ROM Description

6.5.13 M-Boot ROM Reset Cause Handling

As shown in Figure
subsystem CPU core.
Reset Source
POR
XRS Input
M3 WDT0 reset
M3 WDT1 reset
M3 NMIWD reset (M3 NMIRS)
M3 Software reset / debugger reset
M3 H/W BIST Reset
CLOCK_INIT(s) in the above table means SYSDIVSEL and M3SSDIVSEL dividers are configured for
divide by 1 operation, as explained in

6.5.14 M-Boot ROM Exceptions Handling

Table 6-7 shows how M-Boot ROM handles different possible exceptions that can occur during boot.
Exception Source
CLOCKFAIL
M3BISTERR
C28BISTERR
EXTGPIO
C28PIENMIERR
C28NMIWDRST
ACIBERR
Bus Fault/ Memory Management Fault/
Usage Fault
Hard Fault
Spurious/un supported NVIC interrupt
596
ROM Code and Peripheral Booting
6-4, M-Boot ROM will be executed for any reset cause that resets the master
Table 6-6 gives details on how M-Boot ROM handles each reset.
Table 6-6. M-Boot ROM Reset Cause Handling
M-Boot ROM action
Check FastBoot ModeZero-initialize all master subsystem memories, NMI Enable,
CLOCK_INIT(s) and follow normal boot-up procedure
Check FastBoot Zero-initialize M-Boot ROM stack memory, NMI
Enable,CLOCK_INIT(s) and follow normal boot-up procedure
Check FastBoot Zero-initialize M-Boot ROM stack memory, NMI
Enable,CLOCK_INIT(s) and follow normal boot-up procedure
Check FastBoot Zero-initialize M-Boot ROM stack memory, NMI
Enable,CLOCK_INIT(s) and follow normal boot-up procedure
Check FastBoot Zero-initialize M-Boot ROM stack memory, NMI
Enable,CLOCK_INIT(s) and follow normal boot-up procedure
Check FastBoot Zero-initialize M-Boot ROM stack memory and follow normal boot-up
procedure. Note that clock settings are not modified here.
Check FastBoot Zero-initialize M-Boot ROM stack memory, NMI
Enable,CLOCK_INIT(s) and call BIST handler
Section 6.5.8
Table 6-7. M-Boot ROM Exceptions Handling
CLKFAIL condition detected
BIST error on M3
BIST error on C28X
External GPIO NMI
NMI vector fetch mismatch on the control
subsystem
The control subsystem is reset by
CNMIWD timer
ACIB access error
Triggers HARD FAULT exception to NVIC
Triggers HARD FAULT exception to NVIC
Triggered because of any errors
Copyright © 2012–2019, Texas Instruments Incorporated
above.
Description
Clear MNMI Flags and log the error in
boot status location and continue to boot.
MCLKSTS.MCLKFLG is not cleared here.
Clear NMI Flags and log the error in boot
status location and continue to boot.
Clear NMI Flags and log the error in boot
status location and continue to boot.
Clear MNMI Flags and log the error in
boot status location and continue to boot.
Clear MNMI Flags and log the error in
boot status location and continue to boot.
Clear MNMI Flags and log the error in
boot status location and continue to boot.
Clear MNMI Flags and log the error in
boot status location and continue to boot.
Log the error in boot status and configure
WDT0 and loop and let device reset on
WDT0 timeout
Log the error in boot status and configure
WDT0 and loop and let device reset on
WDT0 timeout
Log the error in boot status and configure
WDT0 and loop and let device reset on
WDT0 timeout.
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
M-Boot ROM Action
Submit Documentation Feedback