Functional Description; Gptm Reset Conditions; Available Ccp Pins; General-Purpose Timer Capabilities - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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Timer
Timer 0
Timer 1
Timer 2
Timer 3
2.3

Functional Description

The main components of each GPTM block are two free-running up/down counters (referred to as Timer A
and Timer B), two match registers, two prescaler match registers, two shadow registers, and two
load/initialization registers and their associated control functions. The exact functionality of each GPTM is
controlled by software and configured through the register interface. Timer A and Timer B can be used
individually, in which case they have a 16-bit counting range. In addition, Timer A and Timer B can be
concatenated to provide a 32-bit counting range. Note that the prescaler can only be used when the timers
are used individually.
The available modes for each GPTM block are shown in
prescaler acts as a true prescaler and contains the least-significant bits of the count. When counting up,
the prescaler acts as a timer extension and holds the most-significant bits of the count
Mode
One-shot
Periodic
RTC
Edge Count
Edge Time
PWM
(1)
The prescaler is only available when the timers are used individually
Software configures the GPTM using the GPTM Configuration (GPTMCFG) register, the GPTM Timer A
Mode (GPTMTAMR) register, and the GPTM Timer B Mode (GPTMTBMR) register. When in one of the
concatentated modes, Timer A and Timer B can only operate in one mode. However, when configured in
an individual mode, Timer A and Timer B can be independently configured in any combination of the
individual modes.

2.3.1 GPTM Reset Conditions

After reset has been applied to the GPTM module, the module is in an inactive state, and all control
registers are cleared and in their default states. Counters Timer A and Timer B are initialized to all 1s,
along with their corresponding load registers: the GPTM Timer A Interval Load (GPTMTAILR) register and
the GPTM Timer B Interval Load (GPTMTBILR) register; and shadow registers: the GPTM Timer A Value
(GPTMTAV) register and the GPTM Timer B Value (GPTMTBV) register. The prescale counters are
initialized to 0x00: the GPTM Timer A Prescale (GPTMTAPR) register, and the GPTM Timer B Prescale
(GPTMTBPR) register .
SPRUHE8E – October 2012 – Revised November 2019
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Table 2-1. Available CCP Pins
16-Bit Up/Down Counter
TimerA
TimerB
TimerA
TimerB
TimerA
TimerB
TimerA
TimerB
Table 2-2. General-Purpose Timer Capabilities
Timer Use
Count Direction
Individual
Up or Down
Concatenated
Up or Down
Individual
Up or Down
Concatenated
Up or Down
Concatenated
Up
Individual
Down
Individual
Down
Individual
Down
Copyright © 2012–2019, Texas Instruments Incorporated
Even CCP Pin
CCP0
-
CCP2
-
CCP4
-
CCP6
-
Table
2-2. Note that when counting down, the
Counter Size
16-bit
32-bit
16-bit
32-bit
32-bit
16-bit
16-bit
16-bit
M3 General-Purpose Timers
Functional Description
Odd CCP Pin
-
CCP1
-
CCP3
-
CCP5
-
CCP7
(1)
Prescaler Size
8-bit
-
8-bit
-
-
8-bit
-
-
307

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