Set The Transmit Companding Mode; Unexpected Frame-Synchronization Pulse With (R/X) Fig = 1; Companding Processes For Reception And For Transmission; Register Bits Used To Set The Transmit Companding Mode - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Transmitter Configuration
Figure 15-52. Unexpected Frame-Synchronization Pulse With (R/X) FIG = 1
CLK(R/X)
FS(R/X)
D(R/X)
(R/X)SYNCERR

15.9.11 Set the Transmit Companding Mode

Table 15-58. Register Bits Used to Set the Transmit Companding Mode
Register Bit
XCR2 4-3
15.9.11.1 Companding
Companding (COMpressing and exPANDing) hardware allows compression and expansion of data in
either μ-law or A-law format. The companding standard employed in the United States and Japan is μ-law.
The European companding standard is referred to as A-law. The specifications for μ-law and A-law log
PCM are part of the CCITT G.711 recommendation.
A-law and μ-law allow 13 bits and 14 bits of dynamic range, respectively. Any values outside this range
are set to the most positive or most negative value. Thus, for companding to work best, the data
transferred to and from the McBSP via the CPU or DMA controller must be at least 16 bits wide.
The μ-law and A-law formats both encode data into 8-bit code words. Companded data is always 8 bits
wide; the appropriate word length bits (RWDLEN1, RWDLEN2, XWDLEN1, XWDLEN2) must therefore be
set to 0, indicating an 8-bit wide serial data stream. If companding is enabled and either of the frame
phases does not have an 8-bit word length, companding continues as if the word length is 8 bits.
Figure 15-53 illustrates the companding processes. When companding is chosen for the transmitter,
compression occurs during the process of copying data from DXR1 to XSR1. The transmit data is
encoded according to the specified companding law (A-law or μ-law). When companding is chosen for the
receiver, expansion occurs during the process of copying data from RBR1 to DRR1. The receive data is
decoded to twos-complement format.
Figure 15-53. Companding Processes for Reception and for Transmission
RSR1
DR
DX
1142
C28 Multichannel Buffered Serial Port (McBSP)
A0 B7 B6 B5 B4
Name Function
XCOMPAND Transmit companding mode
Modes other than 00b are enabled only when the appropriate
XWDLEN is 000b, indicating 8-bit data.
XCOMPAND = 00b
XCOMPAND = 01b
XCOMPAND = 10b
XCOMPAND = 11b
8
RBR1
Expand
8
Compress
XSR1
Copyright © 2012–2019, Texas Instruments Incorporated
Frame synchronization ignored
B3 B2 B1 B0
No companding, any size data, MSB
transmitted first
No companding, 8-bit data, LSB
transmitted first (for details, see
Section 15.8.11.4, Option to Receive
LSB First)
μ-law companding, 8-bit data, MSB
transmitted first
A-law companding, 8-bit data, MSB
transmitted first
16
DRR1
To CPU or DMA controller
16
DXR1
From CPU or DMA controller
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
C7 C6 C5 C4
Type
R/W
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