Eqep Control (Qepctl) Register - Texas Instruments Concerto F28M36 Series Technical Reference Manual

eQEP Registers
Table 9-3. eQEP Decoder Control (QDECCTL) Register Field Descriptions (continued)
Bits Name
12 SPSEL
11 XCR
10 SWAP
9 IGATE
8 QAP
7 QBP
6 QIP
5 QSP
4-0 Reserved
15 14 13 12
FREE, SOFT PCRM
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
878
C28 Enhanced QEP (eQEP) Module
Value
Sync output pin selection
0 Index pin is used for sync output
1 Strobe pin is used for sync output
External clock rate
0 2x resolution: Count the rising/falling edge
1 1x resolution: Count the rising edge only
Swap quadrature clock inputs. This swaps the input to the quadrature decoder, reversing the
counting direction.
0 Quadrature-clock inputs are not swapped
1 Quadrature-clock inputs are swapped
Index pulse gating option
0 Disable gating of Index pulse
1 Gate the index pin with strobe
QEPA input polarity
0 No effect
1 Negates QEPA input
QEPB input polarity
0 No effect
1 Negates QEPB input
QEPI input polarity
0 No effect
1 Negates QEPI input
QEPS input polarity
0 No effect
1 Negates QEPS input
Always write as 0
Figure 9-22. eQEP Control (QEPCTL) Register
11 10 9 8
SEI IEI
R/W-0 R/W-0
Copyright © 2012–2019, Texas Instruments Incorporated
Description
7 6 5 4
SWI SEL IEL
R/W-0 R/W-0 R/W-0
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
3 2 1 0
QPEN QCLM UTE WDE
R/W-0 R/W-0 R/W-0 R/W-0
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