Destination Burst Step Register Size (Dst_Burst_Step); Transfer Size Register (Transfer_Size); Destination Burst Step Register Size (Dst_Burst_Step) Field Descriptions; Transfer Size Register (Transfer_Size) Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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11.8.11 Destination Burst Step Register Size (DST_BURST_STEP) — EALLOW Protected
The destination burst step register size (DST_BURST_STEP) is shown in
Table 11-13.
Figure 11-18. Destination Burst Step Register Size (DST_BURST_STEP)
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-13. Destination Burst Step Register Size (DST_BURST_STEP) Field Descriptions
Bit Field
15-0 DSTBURSTSTEP
11.8.12 Transfer Size Register (TRANSFER_SIZE) — EALLOW Protected
The transfer size register (TRANSFER_SIZE) is shown in
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-14. Transfer Size Register (TRANSFER_SIZE) Field Descriptions
Bit Field
15-0 TRANSFERSIZE
SPRUHE8E – October 2012 – Revised November 2019
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DSTBURSTSTEP
R/W-0
Value Description
These bits specify the destination address post-increment/decrement step size while
processing a burst of data:
0x0FFF Add 4095 to address
... ...
0x0002 Add 2 to address
0x0001 Add 1 to address
0x0000 No address change
0xFFFF Sub 1 from address
0xFFFE Sub 2 from address
... ...
0xF000 Sub 4096 from address
Only values from -4096 to 4095 are valid.
Figure 11-19. Transfer Size Register (TRANSFER_SIZE)
TRANSFERSIZE
R/W-0
Value Description
These bits specify the number of bursts to transfer:
0x0000 Transfer 1 burst
0x0001 Transfer 2 bursts
0x0002 Transfer 3 bursts
... ...
0xFFFF Transfer 65536 bursts
Copyright © 2012–2019, Texas Instruments Incorporated
Figure 11-18
Figure 11-19 and described in
C28 Direct Memory Access (DMA) Module
Register Descriptions
and described in
0
Table 11-14.
0
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