Gpio32, Gpio33 Multiplexing Diagram - Texas Instruments Concerto F28M36 Series Technical Reference Manual

C28 General-Purpose Input/Output (GPIO)
0 = PU disabled (reset value)
1 = PU enabled
(B)
GPIOPUR
PU
GPIOx
High
Impedance
Output
Control
Default at Reset
XRS
A GPxDAT latch/read are accessed at the same memory location.
B Pull-up selection is only controlled by the M3 GPIO registers except GPIO192-GPIO199, which is controlled by the
GPGPUD register.
Notes:
• Note the bit polarity difference between GPIOPUR and GPGPUD registers when enabling pullups.
• Open drain selection is only controlled by the M3 GPIO registers
• The appropriate bits in the GPIOCSEL registers (M3 GPIO registers) must be set to use the C28
GPIOs. If the GPIO is set as an M3 GPIO, the C28 GPIO MUX inputs are still active and can be read.
• The input qualification circuit is not reset when modes are changed (such as changing from output to
input mode). Any state will get flushed by the circuit eventually.
380
General-Purpose Input/Output (GPIO)
Figure 4-36. GPIO32, GPIO33 Multiplexing Diagram
SYSCLKOUT
(default on reset)
Sync
Qual
async
GPBCTRL
GPBSEL1
GPBMUX1
0 = Input , 1 = Output
Copyright © 2012–2019, Texas Instruments Incorporated
00
00
3 samples
01 01
6 samples
10 10
11 11
2
GPIOx_OUT
(default on reset)
00
01 Perpheral 1 output
10 Peripheral 2 output
11 Peripheral 3 output
(default on reset)
GPIOx-DIR
2
00
0x
01
10 Peripheral 2 output enable
1x
11 Peripheral 3 output enable
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
GPBDAT (read)
N/C
Perpheral 1 input
Peripheral 2 input
Peripheral 3 input
GPBSET
GPBCLEAR
GPBTOGGLE
(A)
GPBDAT
(latch)
GPBDIR
(latch)
SDAA/SCLA (I2C output enable)
SDAA/SCLA (I2C data out)
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