Gpio Peripheral Identification 5 (Gpioperiphid5) Register; Gpio Peripheral Identification 5 (Gpioperiphid5) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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4.1.6.21 GPIO Peripheral Identification 5 (GPIOPeriphID5) Register, offset 0xFD4
The GPIOPeriphID4, GPIOPeriphID5, GPIOPeriphID6, and GPIOPeriphID7 registers can conceptually be
treated as one 32-bit register; each register contains eight bits of the 32-bit register, used by software to
identify the peripheral.
Figure 4-24. GPIO Peripheral Identification 5 (GPIOPeriphID5) Register
31
15
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-25. GPIO Peripheral Identification 5 (GPIOPeriphID5) Register Field Descriptions
Bit Field
31-8 Reserved
7-0 PID5
SPRUHE8E – October 2012 – Revised November 2019
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R-0
Value Description
Reserved
GPIO Peripheral ID Register [15:8]
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R-0
8 7
General-Purpose Input/Output (GPIO)
General-Purpose Input/Output (GPIO)
PID5
R-0
16
0
371