Real-Time Window (Rtw); Memory Protection; Control Subsystem Address Mapping - Texas Instruments Concerto F28M36 Series Technical Reference Manual

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shows the address mapping for the control subsystem.

17.9.1 Real-Time Window (RTW)

For allowing uninterrupted accesses to C28x-CPU/C28x-DMA for control-loop data transfer, a real-time

window (RTW) feature has been provided. By enabling this feature, C28x-CPU/C28x-DMA gets dedicated

access of EPI for a specific time period. This feature is enabled by setting the "GRAB" bit in the

CEPIRTWCFG register. Once EPI is grabbed by C28x software (GRAB = 1), all accesses to EPI from

M3/uDMA will be stalled until EPI is released (GRAB = 0) by C28x software.

To prevent permanently locking the EPI by C28x software (in case of error situation) a timeout feature is

provided. User needs to program real time window period register (CEPIRTWPRD) with time period for

which C28x wants to grab the EPI. Once C28x grabs the EPI by setting the GRAB bit, a free running

counter, CEPIRTWCNT, starts incrementing. If C28x software does not release the EPI access (by setting

GRAB bit to '0') before the counter value becomes equal to the value programmed in CEPIRTWPRD

CEPIESTATUS register and an interrupt gets generated to the C28x core.

NOTE: The RTW feature is only needed in an application where both subsystems (master and

control) are accessing EPI and one needs to provide a window for dedicated access to EPI

from the control (C28x) subsystem. Otherwise, by default, both subsystems have access to

EPI with round-robin arbitration.

Since access to external memory space via EPI is shared between all masters, it is important to protect

critical data from getting corrupted by unwanted masters. To achieve this, memory protection feature is

provided for each CSx region. Using this feature, users can enable/disable write accesses to individual

CSx regions from the master or control subsystem. This is done by programming the MEMPROT register.

This register is only accessible by M3 software. By default, accesses to all CSx regions are enabled from

both subsystems.

NOTE: The memory protection feature is only for enabling or disabling the write access. Read

accesses are always enabled for both subsystems.

SPRUHE8E – October 2012 – Revised November 2019

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Table 17-10. Control Subsystem Address Mapping

C28x/DMA Address Start (16-bit word

C28x/DMA Address End (16-bit word

External Peripheral Interface (EPI)

C28x Access to EPI

Available address

lines for control

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