Gpio Port A Data (Gpadat) Register; Gpio Port A Data (Gpadat) Register Field Descriptions - Texas Instruments Concerto F28M36 Series Technical Reference Manual

C28 General-Purpose Input/Output (GPIO)
The GPIO data registers indicate the current status of the GPIO pin, irrespective of which mode the pin is
in. Writing to this register will set the respective GPIO pin high or low if the pin is enabled as a GPIO
output, otherwise the value written is latched but ignored. The state of the output register latch will remain
in its current state until the next write operation. A reset will clear all bits and latched values to zero. The
value read from the GPxDAT registers reflect the state of the pin (after qualification), not the state of the
output latch of the GPxDAT register.
Typically the DAT registers are used for reading the current state of the pins. To easily modify the output
level of the pin refer to the SET, CLEAR and TOGGLE registers.

4.2.7.38 GPIO Port A Data (GPADAT) Register

The GPIO Port A Data (GPADAT) register is shown and described in the figure and table below.
31 30
GPIO31 GPIO30
R/W-x R/W-x
23 22
GPIO23 GPIO22
R/W-x R/W-x
15 14
GPIO15 GPIO14
R/W-x R/W-x
7 6
GPIO7 GPIO6
R/W-x R/W-x
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
(1)
x = The state of the GPADAT register is unknown after reset. It depends on the level of the pin after reset.
Table 4-88. GPIO Port A Data (GPADAT) Register Field Descriptions
Bits Field
31-0 GPIO31-GPIO0
446
General-Purpose Input/Output (GPIO)
Figure 4-79. GPIO Port A Data (GPADAT) Register
29 28
GPIO29 GPIO28
R/W-x R/W-x
21 20
GPIO21 GPIO20
R/W-x R/W-x
13 12
GPIO13 GPIO12
R/W-x R/W-x
5 4
GPIO5 GPIO4
R/W-x R/W-x
Value
Each bit corresponds to one GPIO port A pin (GPIO0-GPIO31)
0 Reading a 0 indicates that the state of the pin is currently low, irrespective of the mode for which
the pin is configured.
Writing a 0 will force an output of 0 if the pin is configured as a GPIO output in the appropriate
GPAMUX1/2 and GPADIR registers; otherwise, the value is latched but not used to drive the
pin.
1 Reading a 1 indicates that the state of the pin is currently high irrespective of the mode for
which the pin is configured.
Writing a 1will force an output of 1if the pin is configured as a GPIO output in the appropriate
GPAMUX1/2 and GPADIR registers; otherwise, the value is latched but not used to drive the
pin.
Copyright © 2012–2019, Texas Instruments Incorporated
27 26
GPIO27 GPIO26
R/W-x R/W-x
19 18
GPIO19 GPIO18
R/W-x R/W-x
11 10
GPIO11 GPIO10
R/W-x R/W-x
3 2
GPIO3 GPIO2
R/W-x R/W-x
(1)
Description
SPRUHE8E – October 2012 – Revised November 2019
www.ti.com
25 24
GPIO25 GPIO24
R/W-x R/W-x
17 16
GPIO17 GPIO16
R/W-x R/W-x
9 8
GPIO9 GPIO8
R/W-x R/W-x
1 0
GPIO1 GPIO0
R/W-x R/W-x
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