Shadow Source Begin And Current Address Pointer Registers (Src_Beg_Addr_Shadow/Dst_Beg_Addr_Shadow) - All Eallow Protected; Active Source Begin And Current Address Pointer Registers; (Src_Beg_Addr/Dst_Beg_Addr); Shadow Source Begin And Current Address Pointer Registers - Texas Instruments Concerto F28M36 Series Technical Reference Manual

Table of Contents

Advertisement

www.ti.com

11.8.19 Shadow Source Begin and Current Address Pointer Registers

(SRC_BEG_ADDR_SHADOW/DST_BEG_ADDR_SHADOW) — All EALLOW Protected
The shadow source begin and current address pointer registers
(SRC_BEG_ADDR_SHADOW/DST_BEG_ADDR_SHADOW) are shown in
Table
11-21.
Figure 11-26. Shadow Source Begin and Current Address Pointer Registers
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-21. Shadow Source Begin and Current Address Pointer Registers
(SRC_BEG_ADDR_SHADOW/DST_BEG_ADDR_SHADOW) Field Descriptions
Bit
Field
31-22
Reserved
21-0
BEGADDR

11.8.20 Active Source Begin and Current Address Pointer Registers

(SRC_BEG_ADDR/DST_BEG_ADDR)

The active source begin and current address pointer registers (SRC_BEG_ADDR/DST_BEG_ADDR) are
shown in
Table 11-22
Figure 11-27. Active Source Begin and Current Address Pointer Registers
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 11-22. Active Source Begin and Current Address Pointer Registers
Bit
Field
31-22
Reserved
21-0
BEGADDR
SPRUHE8E – October 2012 – Revised November 2019
Submit Documentation Feedback

(SRC_BEG_ADDR_SHADOW/DST_BEG_ADDR_SHADOW)

R-0
Value
Description
Reserved
22-bit address value
and described in
Table
(SRC_BEG_ADDR/DST_BEG_ADDR)
R-0
(SRC_BEG_ADDR/DST_BEG_ADDR) Field Descriptions
Value
Description
Reserved
22-bit address value
Copyright © 2012–2019, Texas Instruments Incorporated
22
21
11-22.
22
21
C28 Direct Memory Access (DMA) Module
Register Descriptions
Figure 11-26
and described in
BEGADDR
R/W-0
BEGADDR
R-0
0
0
979

Advertisement

Table of Contents
loading

Table of Contents