Priority Encoding Of The Fault Status Register; Fault Address And Fault Status Registers (Far And Fsr) - Texas Instruments OMAP5910 Technical Reference Manual

2.7.8

Fault Address and Fault Status Registers (FAR and FSR)

Table 2–23. Priority Encoding of the Fault Status Register
Source
Highest priority
†
Alignment
External abort on transaction
Transaction
Domain
Permission
External abort on line fetch
External abort on NCNB access
Lowest priority
† Alignment faults write 0b0001 into FS[3-0].
‡ Invalid values in domain[3-0] occur because the fault is raised before a valid domain field has been selected.
§ Fixing the primary abort and restarting the instruction can regenerate any abort masked by the priority encoding.
If an illegal data access (data abort) occurs, the MMU places an encoded 4-bit
value FS[3–0] and the 4-bit encoded domain number in the fault status register
(FSR). In addition, the virtual address associated with the data abort is stored
into the fault address register (FAR). If an access violation results from multiple
causes, the faults are encoded according to the priorities given in Table 2–23.
Faults that occur during an instruction fetch are not stored in FSR and FAR.
The following sections describe the various access permissions and controls
supported by the MMU and detail how they are interpreted to generate faults.
Priority
0b0001
First level 0b1100
Second 0b1110
level
Section 0b0101
Page 0b0111
Section 0b1001
Page 0b1011
Section 0b1101
Page 0b1111
Section 0b0100
Page 0b0110
Section 0b1000
Page 0b1010
MPU Memory Management Unit
Domain [3-0] FAR
‡
Invalid VA of access causing abort
Invalid VA of access causing abort
Valid
Invalid VA of access causing abort
Valid
Valid VA of access causing abort
Valid
Valid VA of access causing abort
Valid
Valid VA of start of cache line being
loaded
Valid
Valid VA of access causing abort
Valid
MPU Subsystem
§
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