Irq Alarm Interrupt Waveform - Texas Instruments OMAP5910 Technical Reference Manual

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Alarm Interrupt

Figure 7–63. IRQ Alarm Interrupt Waveform

Timer counter

Oscillator Drift Compensation

IRQ_ALARM_CHIP interrupt can be generated when the time set into time

and calendar alarm registers is exactly the same as in the time and calendar

registers (see Figure 7–63).

This interrupt is then generated if the IT_ALARM bit of the interrupts register

This interrupt is low-level sensitive; RTC_STATUS_REG[6] indicates that

IRQ_ALARM_CHIP occurred.

This interrupt is disabled by writing 1 into the RTC_STATUS_REG[6].

Alarm TCregisters = TCs

To compensate for any inaccuracy of the 32-kHz oscillator, the MPU can per-

form a calibration of the oscillator frequency, calculate the drift compensation

versus one-hour period, and load the compensation registers with the drift

compensation value (see Figure 7–64).

Autocompensation is enabled by the AUTO_COMP_EN bit in the RTC_CTRL

If the COMP_REG value is positive, compensation occurs after the second

change event. COMP_REG cycles are removed from the next second.

If the COMP_REG value is negative, compensation occurs before the second

change event. COMP_REG cycles are added to the current second.

This enables compensation with one 32-kHz period accuracy each hour.

Write 1 into STATUS[6]

MPU Public Peripherals

Real-Time Clock