Traffic Controller - Texas Instruments OMAP5910 Technical Reference Manual

Figure 4–2. Traffic Controller
32
ROM
E
16
SRAM
Flash M
SBFlash Slow bus
I
F
S
E
16
M
SDRAM
I
Fast bus
F
F
32
I
S
M
R
I
A
F
M
(192
KB)
Internal
SRAM bus
MMU
Local bus
32
Local bus
interface
To/from
DSP
MMU

Traffic controller

MPU bus 32
Slow I/F DMA 32
Fast I/F DMA 32
MPU bus
32
SRAM DMA 32
Local bus DMA
32
32
MPU bus
MPU
To/from
MPUI port
16
MPUI
32 32
MPUI-DMA
Slow
port
port
Fast
32
port
TIPB
System
port
DMA
controller
SRAM
port
Local
port
MPU TI peripheral bus (private)
Memory Interface Traffic Controller
Introduction
T
I
MPU
32
TI peripheral
P
bus
B
(public)
MPU
32
B
TI peripheral
bus
R
(private)
I
D
G
E
(2)
4-3