Pulldown Control 0 Register (Pull_Dwn_Ctrl_0) - Texas Instruments OMAP5910 Technical Reference Manual

Table 6–42. Pulldown Control 0 Register (PULL_DWN_CTRL_0)
Bits Name
31–29 RESERVED
28 CONF_PDEN_CAM_HS_R
27–25 RESERVED
24 CONF_PDEN_CAM_D_2_R
23 CONF_PDEN_CAM_D_3_R
22 RESERVED
21 CONF_PDEN_CAM_D_5_R
Note: Unless otherwise indicated, pulldown control for each I/O is forced off at reset while in compatibility mode. The pull-
down control register bits only control the pulldowns while in native mode. Depending upon the pin multiplexing config-
uration of any particular I/O, a pulldown may not be available. Consult Appendix A of this document or the OMAP5910
data manual (literature number SPRS197) to determine whether a pulldown exists for each I/O.
Value Description (see Note)
Reserved for future expansion.
These bits must always be written as
0.
These bits control the pulldown
enable on the OMAP5910 I/O, which
defaults to CAM.HS at reset.
0 Pulldown enabled
1 Pulldown disabled
Reserved for future expansion.
These bits must always be written as
0.
These bits control the pulldown en-
able on the OMAP5910 I/O, which
defaults to CAM.D[2] at reset.
0 Pulldown enabled
1 Pulldown disabled
These bits control the pulldown en-
able on the OMAP5910 I/O, which
defaults to CAM.D[3] at reset.
0 Pulldown enabled
1 Pulldown disabled
Reserved for future expansion.
These bits must always be written as
0.
These bits control the pulldown en-
able on the OMAP5910 I/O, which
defaults to CAM.D[5] at reset.
0 Pulldown enabled
1 Pulldown disabled
OMAP5910 Configuration Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MPU Private Peripherals
Reset
Value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
6-45