Rtc Status Register (Rtc_Status_Reg) - Texas Instruments OMAP5910 Technical Reference Manual

Table 7–140. RTC Status Register (RTC_STATUS_REG)
Bit Name
†
7 POWER_UP
‡
6 ALARM
5 1D_EVENT
4 1H_EVENT
3 1M_EVENT
2 1S_EVENT
§
1 RUN
0 BUSY
† POWER_UP is set by a reset and cleared by writing 1 to this bit.
‡ The alarm interrupt keeps its low level until the MPU writes 1 in the ALARM bit of this register. The timer interrupt is a low-level
pulse (15 µs duration).
§ The STOP_RTC signal is synchronized on the 32-kHz clock, so only 1 clock period can elapse between the write to STOP_RTC
and the RTC actually being stopped. The RUN bit shows the actual state of the RTC.
Table 7–141. RTC Interrupts Register (RTC_INTERRUPTS_REG)
Bit Name
7–4 Reserved
3 IT_ALARM
2 IT_TIMER
Note: The MPU must respect the busy period to prevent spurious interrupt.
Value Function
Indicates that a reset occurred
Indicates that an alarm interrupt has been
generated
One day has occurred
One hour has occurred
One minute has occurred
One second has occurred
0 RTC is frozen
1 RTC is running
Updating event in more than 15 µs
0
1 Updating event
Value Function
Enable one interrupt when the alarm value is
reached (time and calendar alarms) by the time
and calendars.
Enable periodic interrupt
0 Interrupt disabled
1 Interrupt enabled
Real-Time Clock
R/W
R/W
R/W
R
R
R
R
R
R
R/W
R
R/W
R/W
MPU Public Peripherals
Reset
Value
1
0
0
0
0
0
0
0
Reset
Value
0000
0
0
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