Interface Status Register (Status_Reg) - Texas Instruments OMAP5910 Technical Reference Manual

Table 9–35. Interface Status Register (STATUS_REG)
Bit Name
15–7 Reserved
6 Reserved
5 TX underflow
4 TX ready
3 RX overflow
2 RX ready
1 Error type few/
many
0 Frame error
Value Description
Reserved bits. These bits
should always be written as 0.
Reserved bits. These bits
should always be written as 0.
Transmit underflow
0 No under
1 Under
Flag for transmit interrupt
occurrence
0 No int
1 Int
Receive overflow
0 No over
1 Over
Flag for receive interrupt
occurrence
0 No int
1 Int
Too short (few) or too long
frame (many) status
0 Short
1 Long
Error flag when wrong frame
duration
0 Correct
1 Bad
This register is cleared by a software reset.
Multichannel Serial Interfaces
Hardware
Access
Reset
R 0000 0000 0
R/W 0
R 0
R/W 0
R 0
R/W 0
R 0
R/W 0
DSP Public Peripherals
Software
Reset
0000 0000 0
0
0
0
0
0
0
0
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