Data Time-Out Conditions; Mmc Data Time-Out Register (Mmc_Dto) - Texas Instruments OMAP5910 Technical Reference Manual

MMC/SD Host Controller
Table 7–104. MMC Data Time-out Register (MMC_DTO)
Bit Name
15–0 DTO
Data Time-out Value (DTO)
Table 7–105. Data Time-out Conditions
DTO DTO_PS_En=0
0x0000 No time-out
0x0001 1
0x0002 2
... ...
0xFFFF 65535 (2
7-144
This 16-bit register specifies the maximum number of clock cycles before a
data time-out condition occurs.
Description
Data read time-out
In MMC/SD mode, the local host sets this field (bits 15-0) based on N
cycles. N is computed from the parameters TAAC and NSAC and the
AC
operating clock frequency.
TAAC and NSAC are CSD card parameters and can be obtained by reading
the response register after a successful execution of a SEND_CSD command
(CMD9).
If the card does not respond within the specified number of cycles, data time-
out gets set to 1 in MMC_STAT[5] register bit.
The effective number of clock cycles for time-out value are to be multiplied by
1024 if MMC_SDIO:DTO_PS_En=1 and by 1 if DTO_PS_En=0.
In SPI mode, a data time-out condition is also generated if the RDY/BUSY
signal is asserted low (BUSY) for DTO consecutive clocks cycles (see
Table 7–105).
DTO_PS_En=1
No time-out
1024
2048
...
16
-1) 67107840 (2
Values after reset are low (all 16 bits).
MMC clock cycles
26 10
-2 )
clock
AC