Domain Access Control Register Format; Interpreting Access Bits In Domain Access Control Register - Texas Instruments OMAP5910 Technical Reference Manual

MPU Memory Management Unit
2.7.9 Domain Access Control
Figure 2–19. Domain Access Control Register Format
31 30 29 28
15 14
15 14 13 12
7 6
Table 2–24. Interpreting Access Bits in Domain Access Control Register
2-42
MMU accesses are primarily controlled via domains. There are 16 domains,
and each domain has a 2-bit field to define it. Two kinds of users are supported:
clients and managers. Clients use a domain; managers control the behavior
of the domain. The domains are defined in the domain access control register.
The following figure illustrates how the 32 bits of the register are allocated to
define the sixteen 2-bit domains.
27 26 25
13 12
11 10 9
5 4
Table 2–24 defines how the bits within each domain are interpreted to specify
the access permissions.
Value Access Type
0b00 No access
0b01 Client
0b10 Reserved
0b11 Manager
24 23 22 21
11
8 7 6 5
3
Description
Any access generates a domain fault.
Access permission is checked against the permission
given by the page descriptor.
Behaves like no access
The access permission is not checked; permission
faults are not generated.
20 19 18
10 9
4 3 2
2 1
17 16
8
1 0
0